G.J.M. Janssen
Please Note
14 records found
1
Loudspeaker Filter Design With AI
Genetic Algorithm Selection Methods
Loudspeaker filter optimization with AI
Electrical circuit representation, mutation and analysis for AI
Loudspeaker Filter Design with AI
Communication, Evaluation and User Interaction
For selecting a cost function, not enough data was obtained to make a deliberate decision based on performance. Therefore, this decision was based on theory and subordinate features. Nonetheless, the final program is able to create flat acoustic responses in a margin of 2 dB. ...
For selecting a cost function, not enough data was obtained to make a deliberate decision based on performance. Therefore, this decision was based on theory and subordinate features. Nonetheless, the final program is able to create flat acoustic responses in a margin of 2 dB.
Motional Feedback Control for Bass Loudspeakers
Subgroup Theory
Motional Feedback in a Bass Loudspeaker
Analogue Implementation
Motional Feedback in a Bass Loudspeaker
Digital Implementation
An IQ offset and gain mismatch detection technique is developed for PhADCs and verified. The offset and gain mismatch is estimated by detecting the phase vector distribution imbalance among the four phase quadrants after the analog-to-phase conversion. A feedback path has been constructed between the PhADC output and the offset/mismatch compensation interface. The closed loop will help the compensation interface to settle to the proper compensation values of the offset and mismatch. Incorporating this cancellation loop in a receiver system can improve its sensitivity and robustness.
In a conventional IQ ADC receiver we have two quantizations, i.e., one for I and one for Q, and then process the information to extract the phase. By contrast, the PhADC, due to its embedded demodulation attribute, performs only phase quantization. So only one quantization is needed. Because of its compactness, the hardware is simpler and thereby consumes less energy. Moreover the PhADC is immune to magnitude variations, because in an IQ ADC, amplitude quantization noise produces larger phase quantization noise at small vector
magnitudes, while in a PhADC a larger vector has the same phase quantization error as a small vector. Because of these advantages the PhADC is a very good candidate for low power communication. A detection algorithm has been developed that detects the phase vector distribution imbalance between the left and right IQ complex half plane in case of I offset and between the top and bottom of IQ complex half plane in case of Q offset. Using this imbalance we can determine the sign and size of IQ offset. A similar approach has been done for IQ gain mismatch, where the phase vector distribution imbalance is detected between the four phase quadrants in the IQ complex plane. A mixed-signal approach, i.e., detecting the offset and mismatch in the digital domain and compensate in the analog domain.
It is well known that in the IQ ADC receiver the offset and mismatch can be detected and calibrated if necessary before the amplitude is converted into phase in the digital domain, but in the PhADC receiver the offset and mismatch cannot be determined directly due to the absence of amplitude information. Here, we use phase information rather than amplitude information for detection and compensation. For this reason, we have created a direct mismatch and offset detection technique using the output phase signal of the PhADC. The relation between signal-to-noise power ratio (SNR) and its digital counter parts bit-energy-to-noise density (Eb/No) and symbol-energy-to-noise density (Es/No) is established and is used to show the effect of IQ offset and gain mismatch on the BER as a function of channel and phase quantization noise from the PhADC.
It is shown that Eb/No and or Es/No are not the same as SNR and less understood ratios that are often confused with SNR. The relation between SNR and Eb/No, or for higher dimensions (i.e., multiple bits per symbol), the Es/No depends on the modulation parameters. For π/4 DQPSK modulation, the following relationship holds:Eb/No = SNR + 0.97 dB.
An ideal PhADC receiver for π/4 DQPSK demodulation, with a noise-free channel, can tolerate a maximum IQ offset of 28 mV and a gain mismatch of ± 25 dB for a required BER of 10-5 according to the IEEE802.15.6 standard. But with a channel noise of SNR= 21dB these become 22 mV and ± 6 dB, respectively. A practical PhADC receiver with the same channel noise can tolerate a maximum IQ offset of 14mV and a gain mismatch of ± 3 dB.
An approach is presented to convert the PhADC receiver analog channel select filter to a digital one for discrete modeling purposes in Matlab Simulink. First, the Laplace transfer functions of the filter stages and from those the overall Laplace transfer function of the total filter are derived. A mapping procedure is proposed to convert the continuous time domain Laplace transfer function to a discrete one. ...
An IQ offset and gain mismatch detection technique is developed for PhADCs and verified. The offset and gain mismatch is estimated by detecting the phase vector distribution imbalance among the four phase quadrants after the analog-to-phase conversion. A feedback path has been constructed between the PhADC output and the offset/mismatch compensation interface. The closed loop will help the compensation interface to settle to the proper compensation values of the offset and mismatch. Incorporating this cancellation loop in a receiver system can improve its sensitivity and robustness.
In a conventional IQ ADC receiver we have two quantizations, i.e., one for I and one for Q, and then process the information to extract the phase. By contrast, the PhADC, due to its embedded demodulation attribute, performs only phase quantization. So only one quantization is needed. Because of its compactness, the hardware is simpler and thereby consumes less energy. Moreover the PhADC is immune to magnitude variations, because in an IQ ADC, amplitude quantization noise produces larger phase quantization noise at small vector
magnitudes, while in a PhADC a larger vector has the same phase quantization error as a small vector. Because of these advantages the PhADC is a very good candidate for low power communication. A detection algorithm has been developed that detects the phase vector distribution imbalance between the left and right IQ complex half plane in case of I offset and between the top and bottom of IQ complex half plane in case of Q offset. Using this imbalance we can determine the sign and size of IQ offset. A similar approach has been done for IQ gain mismatch, where the phase vector distribution imbalance is detected between the four phase quadrants in the IQ complex plane. A mixed-signal approach, i.e., detecting the offset and mismatch in the digital domain and compensate in the analog domain.
It is well known that in the IQ ADC receiver the offset and mismatch can be detected and calibrated if necessary before the amplitude is converted into phase in the digital domain, but in the PhADC receiver the offset and mismatch cannot be determined directly due to the absence of amplitude information. Here, we use phase information rather than amplitude information for detection and compensation. For this reason, we have created a direct mismatch and offset detection technique using the output phase signal of the PhADC. The relation between signal-to-noise power ratio (SNR) and its digital counter parts bit-energy-to-noise density (Eb/No) and symbol-energy-to-noise density (Es/No) is established and is used to show the effect of IQ offset and gain mismatch on the BER as a function of channel and phase quantization noise from the PhADC.
It is shown that Eb/No and or Es/No are not the same as SNR and less understood ratios that are often confused with SNR. The relation between SNR and Eb/No, or for higher dimensions (i.e., multiple bits per symbol), the Es/No depends on the modulation parameters. For π/4 DQPSK modulation, the following relationship holds:Eb/No = SNR + 0.97 dB.
An ideal PhADC receiver for π/4 DQPSK demodulation, with a noise-free channel, can tolerate a maximum IQ offset of 28 mV and a gain mismatch of ± 25 dB for a required BER of 10-5 according to the IEEE802.15.6 standard. But with a channel noise of SNR= 21dB these become 22 mV and ± 6 dB, respectively. A practical PhADC receiver with the same channel noise can tolerate a maximum IQ offset of 14mV and a gain mismatch of ± 3 dB.
An approach is presented to convert the PhADC receiver analog channel select filter to a digital one for discrete modeling purposes in Matlab Simulink. First, the Laplace transfer functions of the filter stages and from those the overall Laplace transfer function of the total filter are derived. A mapping procedure is proposed to convert the continuous time domain Laplace transfer function to a discrete one.
The study finds that a suitable time interval for optimisation does exist, and is 240 minutes, for both the simulation areas. The study finds RS power to be the most suitable parameter for self-optimisation, in both the areas. However, the research runs into some unexpected results with respect to the optimisations using tilt angle, and has been discussed in detail in the report. Significant gains are observed with SON, as compared to the case of ‘No SON’ or an un-optimised network.
...
The study finds that a suitable time interval for optimisation does exist, and is 240 minutes, for both the simulation areas. The study finds RS power to be the most suitable parameter for self-optimisation, in both the areas. However, the research runs into some unexpected results with respect to the optimisations using tilt angle, and has been discussed in detail in the report. Significant gains are observed with SON, as compared to the case of ‘No SON’ or an un-optimised network.
Gigabit wireless transmission in dispersive environments
Channel characterization and signal processing algorithms
This thesis is dedicated to develop signal processing algorithms to design highspeed wireless transceivers that can perform in highly reflective and harsh environments. The start of this research work initiated as a collaboration between TU Delft and an industrial partner, on a research aimed at short range gigabit wireless link within a lithography machine. The underlying unique wireless environment, together with the challenging specifications of the communication link for mechatronic systems, made this a compelling research project. ...
This thesis is dedicated to develop signal processing algorithms to design highspeed wireless transceivers that can perform in highly reflective and harsh environments. The start of this research work initiated as a collaboration between TU Delft and an industrial partner, on a research aimed at short range gigabit wireless link within a lithography machine. The underlying unique wireless environment, together with the challenging specifications of the communication link for mechatronic systems, made this a compelling research project.