AG
A. Garcia Almudever
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Visualization tools
For the OpenQL compiler
The rapid progress quantum devices have made in recent years has led to the need for systems that bridge the gap between quantum algorithms and quantum hardware. To this purpose different full-stack quantum programming platforms have been developed, providing high level languages for expressing quantum algorithms and providing compilers for making those quantum algorithms executable on a given quantum device. OpenQL is one such a platform, with support for compiling a variety of quantum program inputs into a quantum circuit, ready to be executed on the targeted quantum hardware. OpenQL is an evolving tool in which new features are constantly added to improve its performance and extend its functionality. In order to enhance OpenQL and provide some extra support to the researchers using OpenQL for their experiments, a visualization tool with three main functionalities has been developed in this thesis project. First, a circuit visualizer, with support for both visualizing the circuit output of the OpenQL compiler as an abstract gate representation and a pulse representation, which has been made specifically for quantum hardware running on superconducting qubits. Secondly, a mapping graph visualizer, which allows displaying the logical to physical qubit mapping per program cycle. And lastly a qubit interaction graph generator, which shows the required interactions between qubits of a given quantum algorithm.
...
The rapid progress quantum devices have made in recent years has led to the need for systems that bridge the gap between quantum algorithms and quantum hardware. To this purpose different full-stack quantum programming platforms have been developed, providing high level languages for expressing quantum algorithms and providing compilers for making those quantum algorithms executable on a given quantum device. OpenQL is one such a platform, with support for compiling a variety of quantum program inputs into a quantum circuit, ready to be executed on the targeted quantum hardware. OpenQL is an evolving tool in which new features are constantly added to improve its performance and extend its functionality. In order to enhance OpenQL and provide some extra support to the researchers using OpenQL for their experiments, a visualization tool with three main functionalities has been developed in this thesis project. First, a circuit visualizer, with support for both visualizing the circuit output of the OpenQL compiler as an abstract gate representation and a pulse representation, which has been made specifically for quantum hardware running on superconducting qubits. Secondly, a mapping graph visualizer, which allows displaying the logical to physical qubit mapping per program cycle. And lastly a qubit interaction graph generator, which shows the required interactions between qubits of a given quantum algorithm.
The Quantum Approximate Optimization Algorithm
Performance on Max-Cut using Heuristic Parameter determination
The Quantum Approximate Optimization Algorithm (QAOA) is one of the promising near-term algorithms designed to find approximate solutions for combinatorial optimization problems. The algorithm prepares a parametrized state that is aimed to maximize the expectation value of the objective function of the problem. The circuit for QAOA consists of p layers, and it depends on 2p parameters, the determination of which can be carried out using a variational quantum eigensolver (VQE) subroutine. This is a variational approach for finding optimal parameters, where the quantum state is prepared with a quantum computer, and a classical computer is used for calculating the corresponding objective function value and performing an outer loop optimization routine in order to find optimal parameters. Earlier work on the algorithm has shown that QAOA is closely related to the Quantum Adiabatic Algorithm, which results in noticeable patterns in the optimal parameters. To this purpose, two methods, INTERP and FOURIER, were proposed to exploit this structure by Zhou et al. (2018). In this thesis, I extend upon these results by examining the effectiveness of one of their methods, the INTERP method, on the Max-Cut problem from graph theory. The performance of QAOA using this method was studied on several classes of graphs and benchmarked against the currently best-known classical algorithm Goemans-Williamson, which achieves an approximation ratio of ρ ≈ 0.878 on arbitrary graphs. The classes of graphs examined include cyclic, weighted and unweighted 3-regular, and Erdős–Rényi graphs with edge probabilities of 0.5 and 0.75 and graph sizes ranging from 4 to 16. Moreover, it was investigated if the INTERP method offers an advantage compared to random initialization of parameters and whether or not the method is polynomial in p. It was found that different graph classes lead to similar but different parameter patterns. Furthermore, the performance of QAOA using the INTERP method was dependent on the graph class considered. For the small graphs investigated it was found that QAOA outperforms Goemans-Williamson on ER-0.50, ER-0.75 and weighted 3-regular graphs from p=7 and beyond with respect to how well the expectation of the objective function approximates the optimal value, while for unweighted 3-regular graphs p=6 suffices. However, the calculation of the parameters is costly and requires a number of function evaluations that is on the order of the number of possible bipartitions of small graph with sizes n ≤ 16. Moreover, the numerical results suggested that indeed the method is polynomial in p advocating that the algorithm might be a strong alternative to Goemans-Williamson for large graph sizes, once hardware allows it.
...
The Quantum Approximate Optimization Algorithm (QAOA) is one of the promising near-term algorithms designed to find approximate solutions for combinatorial optimization problems. The algorithm prepares a parametrized state that is aimed to maximize the expectation value of the objective function of the problem. The circuit for QAOA consists of p layers, and it depends on 2p parameters, the determination of which can be carried out using a variational quantum eigensolver (VQE) subroutine. This is a variational approach for finding optimal parameters, where the quantum state is prepared with a quantum computer, and a classical computer is used for calculating the corresponding objective function value and performing an outer loop optimization routine in order to find optimal parameters. Earlier work on the algorithm has shown that QAOA is closely related to the Quantum Adiabatic Algorithm, which results in noticeable patterns in the optimal parameters. To this purpose, two methods, INTERP and FOURIER, were proposed to exploit this structure by Zhou et al. (2018). In this thesis, I extend upon these results by examining the effectiveness of one of their methods, the INTERP method, on the Max-Cut problem from graph theory. The performance of QAOA using this method was studied on several classes of graphs and benchmarked against the currently best-known classical algorithm Goemans-Williamson, which achieves an approximation ratio of ρ ≈ 0.878 on arbitrary graphs. The classes of graphs examined include cyclic, weighted and unweighted 3-regular, and Erdős–Rényi graphs with edge probabilities of 0.5 and 0.75 and graph sizes ranging from 4 to 16. Moreover, it was investigated if the INTERP method offers an advantage compared to random initialization of parameters and whether or not the method is polynomial in p. It was found that different graph classes lead to similar but different parameter patterns. Furthermore, the performance of QAOA using the INTERP method was dependent on the graph class considered. For the small graphs investigated it was found that QAOA outperforms Goemans-Williamson on ER-0.50, ER-0.75 and weighted 3-regular graphs from p=7 and beyond with respect to how well the expectation of the objective function approximates the optimal value, while for unweighted 3-regular graphs p=6 suffices. However, the calculation of the parameters is costly and requires a number of function evaluations that is on the order of the number of possible bipartitions of small graph with sizes n ≤ 16. Moreover, the numerical results suggested that indeed the method is polynomial in p advocating that the algorithm might be a strong alternative to Goemans-Williamson for large graph sizes, once hardware allows it.
Master thesis
(2019)
-
Alejandro Morais Tejerina, Carmina García Almudever, Zaid Al-Ars, Fabio Sebastiano, Menno Veldhorst
In recent years, Quantum Computing has gone from theory to a promising reality, leading to quantum chips that in a near future might be able to exceed the computational power of any current supercomputer. For this to happen, there are some problems that must be overcome. For example, in a quantum processor qubits are usually arranged in a 2D architecture with limited connectivity between them and in which only nearest-neighbour interactions are allowed. This restricts the execution of two-qubit gates and requires qubit to be moved to adjacent positions. Quantum algorithms, which are described as quantum circuits, neglect the quantum chip constraints and therefore cannot be directly executed. This is known as the mapping problem. This thesis focuses on the problem of mapping quantum algorithms into a quantum chip based on spin qubits, called the crossbar architecture. In this project we have developed the required compiler support (mapping) for making quantum circuits executable on the crossbar architecture based on the tools provided by OpenQL. Using this compiler, we have analyzed the mapping overhead of the crossbar architecture and studied how it relates to the characteristics of quantum algorithms. In addition, we have developed a verification program that checks the output of the compiler and provides a visualisation tool for debugging.
...
In recent years, Quantum Computing has gone from theory to a promising reality, leading to quantum chips that in a near future might be able to exceed the computational power of any current supercomputer. For this to happen, there are some problems that must be overcome. For example, in a quantum processor qubits are usually arranged in a 2D architecture with limited connectivity between them and in which only nearest-neighbour interactions are allowed. This restricts the execution of two-qubit gates and requires qubit to be moved to adjacent positions. Quantum algorithms, which are described as quantum circuits, neglect the quantum chip constraints and therefore cannot be directly executed. This is known as the mapping problem. This thesis focuses on the problem of mapping quantum algorithms into a quantum chip based on spin qubits, called the crossbar architecture. In this project we have developed the required compiler support (mapping) for making quantum circuits executable on the crossbar architecture based on the tools provided by OpenQL. Using this compiler, we have analyzed the mapping overhead of the crossbar architecture and studied how it relates to the characteristics of quantum algorithms. In addition, we have developed a verification program that checks the output of the compiler and provides a visualisation tool for debugging.
Bachelor thesis
(2019)
-
Otmar Ubbens, Matthias Möller, Carmina García Almudever, Wolter Groenevelt, Lieven Vandersypen
With the rapid development of Quantum Computers (QC) and QC Simulators, there will be an increased demand for functioning Quantum Algorithms in the near future. Some of the most ubiquitously useful algorithms are solvers for linear systems of equations. Since the conception of the Quantum Linear Solver Algorithm (QLSA) by Harrow, Hassidim and Lloyd (HHL) in 2009, many improvements have been made, although a generic implementation for arbitrary matrices and vectors is still not available. In this thesis a variant of the HHL QLSA is studied, and the open challenges are investigated. Solutions for two of the challenges, namely the Eigenvalue Inversion subroutine and the Higher-Order Ancilla Rotation subroutine, are discussed. As part of the thesis project, these subroutines have been implemented in the QX Quantum Computer Simulator, and the subroutines are combined to form a complete Quantum Linear Solver (QLS), with the restraint that the implementation for the vector and Hamiltonian of the matrix must be provided by the user. A proof-of-concept QLS by Cao et al. is also implemented in the QX simulator, and using the implementation of the vector and Hamiltonian of Cao et al. the complete solver is tested. In the process of this thesis, a framework for basic Quantum Arithmetic is built providing three variants of Integer Adders, two variants of Integer Subtracters, one Integer Multiplier and one Integer Divider. In addition, gates not natively available in the QX simulator are implemented, and a number of improvements and extensions of algorithms presented in the literature are given, making the described algorithms function on the QX simulator and extending features.
...
With the rapid development of Quantum Computers (QC) and QC Simulators, there will be an increased demand for functioning Quantum Algorithms in the near future. Some of the most ubiquitously useful algorithms are solvers for linear systems of equations. Since the conception of the Quantum Linear Solver Algorithm (QLSA) by Harrow, Hassidim and Lloyd (HHL) in 2009, many improvements have been made, although a generic implementation for arbitrary matrices and vectors is still not available. In this thesis a variant of the HHL QLSA is studied, and the open challenges are investigated. Solutions for two of the challenges, namely the Eigenvalue Inversion subroutine and the Higher-Order Ancilla Rotation subroutine, are discussed. As part of the thesis project, these subroutines have been implemented in the QX Quantum Computer Simulator, and the subroutines are combined to form a complete Quantum Linear Solver (QLS), with the restraint that the implementation for the vector and Hamiltonian of the matrix must be provided by the user. A proof-of-concept QLS by Cao et al. is also implemented in the QX simulator, and using the implementation of the vector and Hamiltonian of Cao et al. the complete solver is tested. In the process of this thesis, a framework for basic Quantum Arithmetic is built providing three variants of Integer Adders, two variants of Integer Subtracters, one Integer Multiplier and one Integer Divider. In addition, gates not natively available in the QX simulator are implemented, and a number of improvements and extensions of algorithms presented in the literature are given, making the described algorithms function on the QX simulator and extending features.
Bachelor thesis
(2019)
-
Michel Wervers, Maima Postma, Sten Vollebregt, Joost Romijn, Michiel Pertijs, Carmina García Almudever
At this time, sensor developers rely on their own circuit board designs to test new sensors. This means a lot of time and money is spent on designing the custom interface for every newly designed sensor. This report describes a way to have a configurable test bench for sensors. The system consists of a data acquisition unit and multiple circuit boards to be able to have a certain level of reconfigurability for the used pins. This system is also able to generate simple signals. It is therefore a replacement for certain instruments as well. The test bench has 9 configurable pins and a number of external connections. It is simple to use and can do its job automatically. This report focuses on the hardware part, where all the switching and amplification is done. We recommend to use the system on a trial basis, because it is not completely functional yet.
...
At this time, sensor developers rely on their own circuit board designs to test new sensors. This means a lot of time and money is spent on designing the custom interface for every newly designed sensor. This report describes a way to have a configurable test bench for sensors. The system consists of a data acquisition unit and multiple circuit boards to be able to have a certain level of reconfigurability for the used pins. This system is also able to generate simple signals. It is therefore a replacement for certain instruments as well. The test bench has 9 configurable pins and a number of external connections. It is simple to use and can do its job automatically. This report focuses on the hardware part, where all the switching and amplification is done. We recommend to use the system on a trial basis, because it is not completely functional yet.
Quantum computers hold the promise to solve some hard problems that are intractable for even the most powerful current supercomputers. One of the most famous examples is Shor's algorithm for factorizing large numbers, which has exponential speedup compared to its best classical counterparts.
However, running such an algorithm will require to build a large-scale quantum computer consisting of thousands or even millions of qubits that include quantum error correction (QEC) and fault-tolerant (FT) mechanisms.
Quantum computing is already a reality with the so-called Noisy Intermediate-Scale Quantum (NISQ) processors, some of them available in the cloud. Noisy refers to the imperfect control over the qubits and intermediate-scale to the relatively low number of quits (from fifty to a few hundred). Although current
and near-term quantum devices will not have enough qubits for implementing large and fully corrected quantum computations, the use of small quantum error correction codes may extend the computation lifetime of NISQ devices. In this context and as a first step, it is important to test and demonstrate the
fault-tolerance of these QEC codes.
In this thesis, we explore the fault-tolerance of two small quantum correction codes that are good candidates to be applied to NISQ processors, the [[4,2,2]] code and the [[7,1,3]] Steane code. To this purpose, by following the FT criterion prosed by Daniel Gottesman in 2016, we tested both codes using two simulators, the stabilizer formalism simulator that includes quite simple error models and a full density matrix simulator called quantumsim, which includes more realistic noise. The simulations are performed under reasonable noise parameter values. For the [[4,2,2]] code, 235 circuits are tested based
on the two simulators. The results show that in the stabilizer formalism simulation, the FT criterion is satised for all circuits, while not fully satisfied in the full density matrix simulation. For the [[7,1,3]] Steane code, we use a parallel-flag error correction implementation which is tested using the full density matrix simulator. Our results show that without applying any QEC cycle, for all circuits (84 circuits for 1 logical qubit simulation and 452 circuits for 2 logical qubits simulation), the error rate of the encoded circuits is lower than the unencoded ones. Adding a quantum error correction (QEC) cycle will in general increase the error rate of the computation. ...
However, running such an algorithm will require to build a large-scale quantum computer consisting of thousands or even millions of qubits that include quantum error correction (QEC) and fault-tolerant (FT) mechanisms.
Quantum computing is already a reality with the so-called Noisy Intermediate-Scale Quantum (NISQ) processors, some of them available in the cloud. Noisy refers to the imperfect control over the qubits and intermediate-scale to the relatively low number of quits (from fifty to a few hundred). Although current
and near-term quantum devices will not have enough qubits for implementing large and fully corrected quantum computations, the use of small quantum error correction codes may extend the computation lifetime of NISQ devices. In this context and as a first step, it is important to test and demonstrate the
fault-tolerance of these QEC codes.
In this thesis, we explore the fault-tolerance of two small quantum correction codes that are good candidates to be applied to NISQ processors, the [[4,2,2]] code and the [[7,1,3]] Steane code. To this purpose, by following the FT criterion prosed by Daniel Gottesman in 2016, we tested both codes using two simulators, the stabilizer formalism simulator that includes quite simple error models and a full density matrix simulator called quantumsim, which includes more realistic noise. The simulations are performed under reasonable noise parameter values. For the [[4,2,2]] code, 235 circuits are tested based
on the two simulators. The results show that in the stabilizer formalism simulation, the FT criterion is satised for all circuits, while not fully satisfied in the full density matrix simulation. For the [[7,1,3]] Steane code, we use a parallel-flag error correction implementation which is tested using the full density matrix simulator. Our results show that without applying any QEC cycle, for all circuits (84 circuits for 1 logical qubit simulation and 452 circuits for 2 logical qubits simulation), the error rate of the encoded circuits is lower than the unencoded ones. Adding a quantum error correction (QEC) cycle will in general increase the error rate of the computation. ...
Quantum computers hold the promise to solve some hard problems that are intractable for even the most powerful current supercomputers. One of the most famous examples is Shor's algorithm for factorizing large numbers, which has exponential speedup compared to its best classical counterparts.
However, running such an algorithm will require to build a large-scale quantum computer consisting of thousands or even millions of qubits that include quantum error correction (QEC) and fault-tolerant (FT) mechanisms.
Quantum computing is already a reality with the so-called Noisy Intermediate-Scale Quantum (NISQ) processors, some of them available in the cloud. Noisy refers to the imperfect control over the qubits and intermediate-scale to the relatively low number of quits (from fifty to a few hundred). Although current
and near-term quantum devices will not have enough qubits for implementing large and fully corrected quantum computations, the use of small quantum error correction codes may extend the computation lifetime of NISQ devices. In this context and as a first step, it is important to test and demonstrate the
fault-tolerance of these QEC codes.
In this thesis, we explore the fault-tolerance of two small quantum correction codes that are good candidates to be applied to NISQ processors, the [[4,2,2]] code and the [[7,1,3]] Steane code. To this purpose, by following the FT criterion prosed by Daniel Gottesman in 2016, we tested both codes using two simulators, the stabilizer formalism simulator that includes quite simple error models and a full density matrix simulator called quantumsim, which includes more realistic noise. The simulations are performed under reasonable noise parameter values. For the [[4,2,2]] code, 235 circuits are tested based
on the two simulators. The results show that in the stabilizer formalism simulation, the FT criterion is satised for all circuits, while not fully satisfied in the full density matrix simulation. For the [[7,1,3]] Steane code, we use a parallel-flag error correction implementation which is tested using the full density matrix simulator. Our results show that without applying any QEC cycle, for all circuits (84 circuits for 1 logical qubit simulation and 452 circuits for 2 logical qubits simulation), the error rate of the encoded circuits is lower than the unencoded ones. Adding a quantum error correction (QEC) cycle will in general increase the error rate of the computation.
However, running such an algorithm will require to build a large-scale quantum computer consisting of thousands or even millions of qubits that include quantum error correction (QEC) and fault-tolerant (FT) mechanisms.
Quantum computing is already a reality with the so-called Noisy Intermediate-Scale Quantum (NISQ) processors, some of them available in the cloud. Noisy refers to the imperfect control over the qubits and intermediate-scale to the relatively low number of quits (from fifty to a few hundred). Although current
and near-term quantum devices will not have enough qubits for implementing large and fully corrected quantum computations, the use of small quantum error correction codes may extend the computation lifetime of NISQ devices. In this context and as a first step, it is important to test and demonstrate the
fault-tolerance of these QEC codes.
In this thesis, we explore the fault-tolerance of two small quantum correction codes that are good candidates to be applied to NISQ processors, the [[4,2,2]] code and the [[7,1,3]] Steane code. To this purpose, by following the FT criterion prosed by Daniel Gottesman in 2016, we tested both codes using two simulators, the stabilizer formalism simulator that includes quite simple error models and a full density matrix simulator called quantumsim, which includes more realistic noise. The simulations are performed under reasonable noise parameter values. For the [[4,2,2]] code, 235 circuits are tested based
on the two simulators. The results show that in the stabilizer formalism simulation, the FT criterion is satised for all circuits, while not fully satisfied in the full density matrix simulation. For the [[7,1,3]] Steane code, we use a parallel-flag error correction implementation which is tested using the full density matrix simulator. Our results show that without applying any QEC cycle, for all circuits (84 circuits for 1 logical qubit simulation and 452 circuits for 2 logical qubits simulation), the error rate of the encoded circuits is lower than the unencoded ones. Adding a quantum error correction (QEC) cycle will in general increase the error rate of the computation.
Quantum error correction (QEC) is key to have reliable quantum computation and storage, due to the fragility of qubits in current quantum technology and the imperfect application of quantum operations. In order to have efficient quantum computation and storage, active QEC is required. QEC consists of an encoding and a decoding process. The way that encoding protects quantum information is through grouping many unreliable physical qubits into one more reliable logical qubit. Then, computation occurs based on the logical qubits, however, errors still occur on the physical qubits. Decoding is the process of identifying the location and type of errors occurring on the physical qubits. The decoder proposes corrections against the errors that have been identified. In this thesis, we are exploring novel ways to design decoders for QEC codes, focusing on the surface code. We began our investigation by implementing a rule-based decoder for the smallest surface code, which consists of 17 qubits. We incorporated this decoder to a platform that we created, called Quantum Platform Development Framework (QPDO), in order to study the working principles of a Pauli frame and to quantify its potential effect on the decoding performance. The Pauli frame unit keeps track of errors on physical qubits without the need to apply corrections constantly. We quantified through simulation the benefits in terms of the decoding performance and the execution schedule of QEC, minimizing the idle time. Minimizing the execution time is critical, due to the limited time budget of quantum error correction, thus requiring a high speed decoder capable of still reaching high decoding performance. We show that when the decoding time is equal to the time required to run a surface code cycle, the decoder reaches its maximum performance. However, such a rule-based decoder cannot easily scale to larger quantum systems, therefore other decoding approaches should be considered. Most of the classical decoders that have been developed so far, do not have a good balance between short execution time and high decoding performance. Therefore, we proposed decoders that incorporate neural networks to keep the execution time small, while keeping the decoding performance high. We designed a two-module decoder, which included a classical module and a neural network. We named this configuration neural network based decoder (NNbD). We compare different designs of NNbDs with classical decoders and prove that NNbDs can reach similar or better decoding performance compared to classical decoders while having constant execution time. Furthermore, we quantified the execution time of a NNbD and argued about the speed that can be achieved in a hardware chip like a Field Programmable Gate Array (FPGA) or an Application-Specific Integrated Circuit (ASIC). Both the classical module and the neural network are highly parallelizable and fast modules by construction, leading to constant execution time for a given code distance. We proved that neural network based decoders can adapt to any noise model, since the neural network functionality is based on creating a map between the input and output data, requiring no knowledge about the underlying error model. Following that, a comparison between different NNbD design approaches was performed. We show that it is advantageous to start with a classical decoding module and improve on its decoding performance with a neural network rather than having a neural network perform the decoding on its own. Also, in the latter case, the execution time of such a decoder is non-constant and on average larger than the decoder containing a classical module and a neural network. Moreover, we show that for the design containing a classical module and a neural network, the execution time is increasing linearly as the code distance increased, which was mainly attributed to the increase of the size of the neural network. However, there is a fundamental difference between NNbDs and classical decoders in that NNbDs require sampling and training based on data obtained from the problem, unlike classical decoders. As the code distance increases, the amount of data required to be gathered and trained are exponentially increasing, imposing a limit to the size of the quantum system that can be efficiently decoded. We proposed as a solution to have a distributed decoding approach that divides the code into small regions and then decodes each region locally. We show that using such a distributed decoding approach for small code distances does not lead to significant loss in decoding performance, while simultaneously providing a way to decode large code distances. Thus, we were able to create a decoder that can achieve high decoding performance with constant execution time. However, there are still some issues to keep in mind with such kind of decoders. The main challenge of NNbDs is that they are a dedicated decoder for a given problem. Every time that some aspect of the problem changes (quantum error correcting code, code distance, error model), sampling, training and evaluating the decoder needs to be repeated. Moreover, there is a large number of neural network parameters that need to be specifically tuned when the problem changes. A careful study of the design choices is required to maximize the performance of the decoder.
We envision that when sampling and training are performed in hardware, the time required for these processes will be decreased compared to the time required in software. Finally, if the hardware resources allow us to include multiple neural networks, then this can potentially increase the decoding performance. As we presented, dividing the task of decoding to smaller tasks that are distributed to many neural networks can be beneficial. ...
We envision that when sampling and training are performed in hardware, the time required for these processes will be decreased compared to the time required in software. Finally, if the hardware resources allow us to include multiple neural networks, then this can potentially increase the decoding performance. As we presented, dividing the task of decoding to smaller tasks that are distributed to many neural networks can be beneficial. ...
Quantum error correction (QEC) is key to have reliable quantum computation and storage, due to the fragility of qubits in current quantum technology and the imperfect application of quantum operations. In order to have efficient quantum computation and storage, active QEC is required. QEC consists of an encoding and a decoding process. The way that encoding protects quantum information is through grouping many unreliable physical qubits into one more reliable logical qubit. Then, computation occurs based on the logical qubits, however, errors still occur on the physical qubits. Decoding is the process of identifying the location and type of errors occurring on the physical qubits. The decoder proposes corrections against the errors that have been identified. In this thesis, we are exploring novel ways to design decoders for QEC codes, focusing on the surface code. We began our investigation by implementing a rule-based decoder for the smallest surface code, which consists of 17 qubits. We incorporated this decoder to a platform that we created, called Quantum Platform Development Framework (QPDO), in order to study the working principles of a Pauli frame and to quantify its potential effect on the decoding performance. The Pauli frame unit keeps track of errors on physical qubits without the need to apply corrections constantly. We quantified through simulation the benefits in terms of the decoding performance and the execution schedule of QEC, minimizing the idle time. Minimizing the execution time is critical, due to the limited time budget of quantum error correction, thus requiring a high speed decoder capable of still reaching high decoding performance. We show that when the decoding time is equal to the time required to run a surface code cycle, the decoder reaches its maximum performance. However, such a rule-based decoder cannot easily scale to larger quantum systems, therefore other decoding approaches should be considered. Most of the classical decoders that have been developed so far, do not have a good balance between short execution time and high decoding performance. Therefore, we proposed decoders that incorporate neural networks to keep the execution time small, while keeping the decoding performance high. We designed a two-module decoder, which included a classical module and a neural network. We named this configuration neural network based decoder (NNbD). We compare different designs of NNbDs with classical decoders and prove that NNbDs can reach similar or better decoding performance compared to classical decoders while having constant execution time. Furthermore, we quantified the execution time of a NNbD and argued about the speed that can be achieved in a hardware chip like a Field Programmable Gate Array (FPGA) or an Application-Specific Integrated Circuit (ASIC). Both the classical module and the neural network are highly parallelizable and fast modules by construction, leading to constant execution time for a given code distance. We proved that neural network based decoders can adapt to any noise model, since the neural network functionality is based on creating a map between the input and output data, requiring no knowledge about the underlying error model. Following that, a comparison between different NNbD design approaches was performed. We show that it is advantageous to start with a classical decoding module and improve on its decoding performance with a neural network rather than having a neural network perform the decoding on its own. Also, in the latter case, the execution time of such a decoder is non-constant and on average larger than the decoder containing a classical module and a neural network. Moreover, we show that for the design containing a classical module and a neural network, the execution time is increasing linearly as the code distance increased, which was mainly attributed to the increase of the size of the neural network. However, there is a fundamental difference between NNbDs and classical decoders in that NNbDs require sampling and training based on data obtained from the problem, unlike classical decoders. As the code distance increases, the amount of data required to be gathered and trained are exponentially increasing, imposing a limit to the size of the quantum system that can be efficiently decoded. We proposed as a solution to have a distributed decoding approach that divides the code into small regions and then decodes each region locally. We show that using such a distributed decoding approach for small code distances does not lead to significant loss in decoding performance, while simultaneously providing a way to decode large code distances. Thus, we were able to create a decoder that can achieve high decoding performance with constant execution time. However, there are still some issues to keep in mind with such kind of decoders. The main challenge of NNbDs is that they are a dedicated decoder for a given problem. Every time that some aspect of the problem changes (quantum error correcting code, code distance, error model), sampling, training and evaluating the decoder needs to be repeated. Moreover, there is a large number of neural network parameters that need to be specifically tuned when the problem changes. A careful study of the design choices is required to maximize the performance of the decoder.
We envision that when sampling and training are performed in hardware, the time required for these processes will be decreased compared to the time required in software. Finally, if the hardware resources allow us to include multiple neural networks, then this can potentially increase the decoding performance. As we presented, dividing the task of decoding to smaller tasks that are distributed to many neural networks can be beneficial.
We envision that when sampling and training are performed in hardware, the time required for these processes will be decreased compared to the time required in software. Finally, if the hardware resources allow us to include multiple neural networks, then this can potentially increase the decoding performance. As we presented, dividing the task of decoding to smaller tasks that are distributed to many neural networks can be beneficial.
Bachelor thesis
(2018)
-
Mike van der Lans, Carmina García Almudever, Matthias Möller, Wolter Groenevelt, David Elkouss Coronas
Quantum computation is becoming an increasingly interesting field, especially with the rise of real quantum computers. However, current quantum processors contain a few tens of error-prone qubits and the realization of large-scale quantum computers is still very challenging. Therefore, quantum computer simulators are particularly suitable for testing and analysing quantum algorithms without having a real quantum computer at one's disposal. In this thesis, different quantum algorithms such as Grover's and Shor's algorithm as well as key quantum routines such as the Quantum Fourier Transform (QFT) and a quantum adder/subtractor are described and analysed (optimal number of iterations, time complexity). Some of them have been implemented for an arbitrary number of qubits and have been simulated using two different quantum simulators, the QX simulator developed at QuTech and the Liquid simulator from Microsoft. In addition, how errors affect the success rate of the algorithms has been investigated.
...
Quantum computation is becoming an increasingly interesting field, especially with the rise of real quantum computers. However, current quantum processors contain a few tens of error-prone qubits and the realization of large-scale quantum computers is still very challenging. Therefore, quantum computer simulators are particularly suitable for testing and analysing quantum algorithms without having a real quantum computer at one's disposal. In this thesis, different quantum algorithms such as Grover's and Shor's algorithm as well as key quantum routines such as the Quantum Fourier Transform (QFT) and a quantum adder/subtractor are described and analysed (optimal number of iterations, time complexity). Some of them have been implemented for an arbitrary number of qubits and have been simulated using two different quantum simulators, the QX simulator developed at QuTech and the Liquid simulator from Microsoft. In addition, how errors affect the success rate of the algorithms has been investigated.
Mapping of quantum algorithms on a quantum chip
2D topology with nearest neighbor interaction
Quantum algorithms can be described by quantum circuits which consist of quantum bits (qubits) and quantum gates. Such a circuit description assumes that any kind of interaction between qubits is possible. However, quantum chips have limited qubits connectivity only allowing, for instance, nearest-neighbor (NN) interactions. That means, qubits need to be placed in adjacent positions for performing a two-qubit gate. In this thesis, a routing algorithm is proposed where physical qubits or planar-based logical qubits are routed to obey this nearest neighbor constraint in a 2D qubit topology. This algorithm tries to minimize the circuit latency or communication overhead.
The proposed routing algorithm is based on a sliding window principle. Different paths, found by using an adapted breadth-first search algorithm, are evaluated based on the interleaving of the corresponding routing instructions, e.g., SWAP operations with previous instructions, and by looking at the disordering of future qubits. The path that will add the lowest number of cycles to the algorithm is then selected and efficiently inserted with the rest of the instructions. This process continues until all the instructions inside the quantum algorithm obey the nearest neighbor constraints.
The routing algorithm is tested for several real quantum algorithms taken from QLib and ScaffCC, as well as for random generated benchmarks. Taking different alternative paths into account and evaluating those paths for possible interleaving with previous instructions, always has a positive effect to minimize the number of added cycles. The results concerning the evaluation of the disordering of future qubits could have a positive or negative effect on the circuit latency depending on the quantum circuit. ...
The proposed routing algorithm is based on a sliding window principle. Different paths, found by using an adapted breadth-first search algorithm, are evaluated based on the interleaving of the corresponding routing instructions, e.g., SWAP operations with previous instructions, and by looking at the disordering of future qubits. The path that will add the lowest number of cycles to the algorithm is then selected and efficiently inserted with the rest of the instructions. This process continues until all the instructions inside the quantum algorithm obey the nearest neighbor constraints.
The routing algorithm is tested for several real quantum algorithms taken from QLib and ScaffCC, as well as for random generated benchmarks. Taking different alternative paths into account and evaluating those paths for possible interleaving with previous instructions, always has a positive effect to minimize the number of added cycles. The results concerning the evaluation of the disordering of future qubits could have a positive or negative effect on the circuit latency depending on the quantum circuit. ...
Quantum algorithms can be described by quantum circuits which consist of quantum bits (qubits) and quantum gates. Such a circuit description assumes that any kind of interaction between qubits is possible. However, quantum chips have limited qubits connectivity only allowing, for instance, nearest-neighbor (NN) interactions. That means, qubits need to be placed in adjacent positions for performing a two-qubit gate. In this thesis, a routing algorithm is proposed where physical qubits or planar-based logical qubits are routed to obey this nearest neighbor constraint in a 2D qubit topology. This algorithm tries to minimize the circuit latency or communication overhead.
The proposed routing algorithm is based on a sliding window principle. Different paths, found by using an adapted breadth-first search algorithm, are evaluated based on the interleaving of the corresponding routing instructions, e.g., SWAP operations with previous instructions, and by looking at the disordering of future qubits. The path that will add the lowest number of cycles to the algorithm is then selected and efficiently inserted with the rest of the instructions. This process continues until all the instructions inside the quantum algorithm obey the nearest neighbor constraints.
The routing algorithm is tested for several real quantum algorithms taken from QLib and ScaffCC, as well as for random generated benchmarks. Taking different alternative paths into account and evaluating those paths for possible interleaving with previous instructions, always has a positive effect to minimize the number of added cycles. The results concerning the evaluation of the disordering of future qubits could have a positive or negative effect on the circuit latency depending on the quantum circuit.
The proposed routing algorithm is based on a sliding window principle. Different paths, found by using an adapted breadth-first search algorithm, are evaluated based on the interleaving of the corresponding routing instructions, e.g., SWAP operations with previous instructions, and by looking at the disordering of future qubits. The path that will add the lowest number of cycles to the algorithm is then selected and efficiently inserted with the rest of the instructions. This process continues until all the instructions inside the quantum algorithm obey the nearest neighbor constraints.
The routing algorithm is tested for several real quantum algorithms taken from QLib and ScaffCC, as well as for random generated benchmarks. Taking different alternative paths into account and evaluating those paths for possible interleaving with previous instructions, always has a positive effect to minimize the number of added cycles. The results concerning the evaluation of the disordering of future qubits could have a positive or negative effect on the circuit latency depending on the quantum circuit.