Cryo-CMOS Bias-Voltage Generation and Demultiplexing at mK Temperatures for Large-Scale Arrays of Quantum Devices
J. van Staveren (TU Delft - QuTech Advanced Research Centre, QCD/Sebastiano Lab)
L.A. Enthoven (TU Delft - Business Development, TU Delft - QuTech Advanced Research Centre)
Peter Luka Bavdaz (Intel Corporation)
M. Meyer (Kavli institute of nanoscience Delft, TU Delft - QuTech Advanced Research Centre, TU Delft - QCD/Veldhorst Lab, Universitat Innsbruck)
C.C. Déprez (Kavli Institute of Nanoscience Discovery, TU Delft - QCD/Veldhorst Lab, TU Delft - QuTech Advanced Research Centre)
D. Degli Esposti (Kavli institute of nanoscience Delft, TU Delft - QuTech Advanced Research Centre, TU Delft - QCD/Scappucci Lab, TU Delft - QCD/Vandersypen Lab)
C.A. Carlsson (TU Delft - QuTech Advanced Research Centre, Kavli Institute of Nanoscience Discovery, TU Delft - QCD/Scappucci Lab)
A. Tosato (TU Delft - BUS/Quantum Delft, Kavli Institute of Nanoscience Discovery, TU Delft - QuTech Advanced Research Centre)
J. Gong (University of Electronic Science and Technology of China, TU Delft - QCD/Babaie Lab, TU Delft - QuTech Advanced Research Centre)
B. Prabowo (TU Delft - QuTech Advanced Research Centre, TU Delft - QCD/Babaie Lab)
M. Babaie (Kavli Institute of Nanoscience Discovery, TU Delft - QCD/Babaie Lab, TU Delft - QuTech Advanced Research Centre, TU Delft - Electronics)
Carmina García Almudever (Kavli Institute of Nanoscience Discovery, QCD/Sebastiano Lab, Universitat Politécnica de Valencia, TU Delft - QuTech Advanced Research Centre)
M. Veldhorst (Kavli institute of nanoscience Delft, TU Delft - QCD/Veldhorst Lab, TU Delft - QuTech Advanced Research Centre)
G. Scappucci (TU Delft - Communication QuTech, Kavli institute of nanoscience Delft, TU Delft - QCD/Scappucci Lab)
F. Sebastiano (QCD/Sebastiano Lab, TU Delft - QuTech Advanced Research Centre, Kavli institute of nanoscience Delft, TU Delft - Quantum Circuit Architectures and Technology)
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Abstract
The rapidly growing number of qubits in semiconductor quantum computers requires a scalable control interface, including the efficient generation of dc bias voltages for gate electrodes. To avoid unrealistically complex wiring between any room-temperature electronics and the cryogenic qubits, this article presents an integrated cryogenic solution for the bias-voltage generation and distribution for large-scale semiconductor spin-qubit quantum processors. A dedicated cryogenic CMOS (cryo-CMOS) demultiplexer and a cryo-CMOS dc digital-to-analog converter (DAC) have been developed in a 22-nm fin field-effect transistor process to control a codeveloped 2-D array designed with 648 single-hole transistors. Thanks to the dissipation below 120 µ W, the whole system operates at temperatures below 70 mK in a custom-built electrical/mechanical infrastructure embedded in a standard single-pulse-tube dilution refrigerator. The bias voltages generated by the cryo-CMOS DAC are demultiplexed to sample-and-hold structures, allowing to store 96 unique bias voltages over a 3 V range with a voltage drift between 60 µ V / s and 18 mV/s. This work demonstrates a tight integration at mK temperatures of cryo-CMOS bias generation and distribution with a dedicated large-scale quantum device. This showcases how this approach simplifies the wiring to the electronics, thus facilitating the scaling up of quantum processors toward the large number of qubits required for a practical quantum computer.
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