The rapidly growing number of qubits in semiconductor quantum computers requires a scalable control interface, including the efficient generation of dc bias voltages for gate electrodes. To avoid unrealistically complex wiring between any room-temperature electronics and the cryogenic qubits, this article presents an integrated cryogenic solution for the bias-voltage generation and distribution for large-scale semiconductor spin-qubit quantum processors. A dedicated cryogenic CMOS (cryo-CMOS) demultiplexer and a cryo-CMOS dc digital-to-analog converter (DAC) have been developed in a 22-nm fin field-effect transistor process to control a codeveloped 2-D array designed with 648 single-hole transistors. Thanks to the dissipation below 120 µ W, the whole system operates at temperatures below 70 mK in a custom-built electrical/mechanical infrastructure embedded in a standard single-pulse-tube dilution refrigerator. The bias voltages generated by the cryo-CMOS DAC are demultiplexed to sample-and-hold structures, allowing to store 96 unique bias voltages over a 3 V range with a voltage drift between 60 µ V / s and 18 mV/s. This work demonstrates a tight integration at mK temperatures of cryo-CMOS bias generation and distribution with a dedicated large-scale quantum device. This showcases how this approach simplifies the wiring to the electronics, thus facilitating the scaling up of quantum processors toward the large number of qubits required for a practical quantum computer.

Semiconductor spin qubits have emerged as a promising platform for quantum computing, following a significant improvement in their control fidelities over recent years. Increasing the qubit count remains challenging, beginning with the fabrication of small features and complex fan-outs. A particular challenge has been formed by the need for individual barrier gates to control the exchange interaction between adjacent spin qubits. Here, we propose a method to vary two-qubit interactions without applying pulses on individual barrier gates while also remaining insensitive to detuning noise in first order. Experimentally we find that changing plunger gate voltages over 300 mV can tune the exchange energy J from 100 kHz to 60 MHz. This allows us to perform two-qubit operations without changing the barrier gate voltage. Based on these findings we conceptualize a spin qubit architecture without individual barrier gates, simplifying the fabrication while maintaining the control necessary for universal quantum computation.

The electrical characterisation of classical and quantum devices is a critical step in the development cycle of heterogeneous material stacks for semiconductor spin qubits. In the case of silicon, properties such as disorder and energy separation of conduction band valleys are commonly investigated individually upon modifications in selected parameters of the material stack. However, this reductionist approach fails to consider the interdependence between different structural and electronic properties at the danger of optimising one metric at the expense of the others. Here, we achieve a significant improvement in both disorder and valley splitting by taking a co-design approach to the material stack. We demonstrate isotopically purified, strained quantum wells with high mobility of 3.14(8) × 10⁵ cm² V⁻¹ s⁻¹ and low percolation density of 6.9(1) × 10¹⁰ cm⁻². These low disorder quantum wells support quantum dots with low charge noise of 0.9(3) μeV Hz^−1/2 and large mean valley splitting energy of 0.24(7) meV, measured in qubit devices. By striking the delicate balance between disorder, charge noise, and valley splitting, these findings provide a benchmark for silicon as a host semiconductor for quantum dot qubits. We foresee the application of these heterostructures in larger, high-performance quantum processors.

Qubits that can be efficiently controlled are essential for the development of scalable quantum hardware. Although resonant control is used to execute high-fidelity quantum gates, the scalability is challenged by the integration of high-frequency oscillating signals, qubit cross-talk, and heating. Here, we show that by engineering the hopping of spins between quantum dots with a site-dependent spin quantization axis, quantum control can be established with discrete signals. We demonstrate hopping-based quantum logic and obtain single-qubit gate fidelities of 99.97%, coherent shuttling fidelities of 99.992% per hop, and a two-qubit gate fidelity of 99.3%, corresponding to error rates that have been predicted to allow for quantum error correction. We also show that hopping spins constitute a tuning method by statistically mapping the coherence of a 10-quantum dot system. Our results show that dense quantum dot arrays with sparse occupation could be developed for efficient and high-connectivity qubit registers.

Abstract: Quantum information processing and quantum sensing is a central topic for researchers who are part of the Materials Research Society and the Quantum Staging Group is providing leadership and guidance in this context. We convened a workshop before the 2022 MRS Spring Meeting and covered four topics to explore challenges that need to be addressed to further promote and accelerate the development of materials with applications in quantum technologies. This article captures the discussions at this workshop and refers to the pertinent literature. Graphical abstract: (Figure presented.).

Simulations using highly tunable quantum systems may enable investigations of condensed matter systems beyond the capabilities of classical computers. Quantum dots and donors in semiconductor technology define a natural approach to implement quantum simulation. Several material platforms have been used to study interacting charge states, while gallium arsenide has also been used to investigate spin evolution. However, decoherence remains a key challenge in simulating coherent quantum dynamics. Here, we introduce quantum simulation using hole spins in germanium quantum dots. We demonstrate extensive and coherent control enabling the tuning of multi-spin states in isolated, paired, and fully coupled quantum dots. We then focus on the simulation of resonating valence bonds and measure the evolution between singlet product states which remains coherent over many periods. Finally, we realize four-spin states with s-wave and d-wave symmetry. These results provide means to perform non-trivial and coherent simulations of correlated electron systems.

Highly uniform quantum systems are essential for the practical implementation of scalable quantum processors. While quantum dot spin qubits based on semiconductor technology are a promising platform for large-scale quantum computing, their small size makes them particularly sensitive to their local environment. Here, we present a method to electrically obtain a high degree of uniformity in the intrinsic potential landscape using hysteretic shifts of the gate voltage characteristics. We demonstrate the tuning of pinch-off voltages in quantum dot devices over hundreds of millivolts that then remain stable at least for hours. Applying our method, we homogenize the pinch-off voltages of the plunger gates in a linear array for four quantum dots, reducing the spread in pinch-off voltages by one order of magnitude. This work provides a new tool for the tuning of quantum dot devices and offers new perspectives for the implementation of scalable spin qubit arrays.

The small footprint of semiconductor qubits is favorable for scalable quantum computing. However, their size also makes them sensitive to their local environment and variations in the gate structure. Currently, each device requires tailored gate voltages to confine a single charge per quantum dot, clearly challenging scalability. Here, we tune these gate voltages and equalize them solely through the temporary application of stress voltages. In a double quantum dot, we reach a stable (1,1) charge state at identical and predetermined plunger gate voltage and for various interdot couplings. Applying our findings, we tune a 2 × 2 quadruple quantum dot such that the (1,1,1,1) charge state is reached when all plunger gates are set to 1 V. The ability to define required gate voltages may relax requirements on control electronics and operations for spin qubit devices, providing means to advance quantum hardware.

Gate-defined quantum dots in silicon-germanium heterostructures have become a compelling platform for quantum computation and simulation. Thus far, developments have been limited to quantum dots defined in a single plane. Here, we propose to advance beyond planar systems by exploiting heterostructures with multiple quantum wells. We demonstrate the operation of a gate-defined double quantum dot in a strained germanium double quantum well, where both quantum dots are tunnel coupled to both reservoirs and parallel transport occurs. We analyze the capacitive coupling to nearby gates and find both quantum dots to be accumulated under the central plunger gate. We extract their position and size, from which we conclude that the double quantum dots are vertically stacked in the two quantum wells. We discuss the challenges and opportunities of multilayer devices and outline some potential applications in quantum computing and quantum simulation.