M. Hoogelander
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11 records found
1
Silicon-Integrated Arrays for Passive Terahertz Cameras
Towards Compact and High-Resolution Imaging using Direct Detectors
To explore the realization of such a camera, we first extensively characterized a previously proposed chessboard FPA that was designed to achieve a near diffractionlimited resolution. This chessboard FPA was integrated with direct detectors based on Schottky diodes in 22-nm CMOS, and operates from 200 GHz to 600 GHz. Characterization was performed using an over-the-air measurement setup, enabling 2-D, multi-beam pattern characterization with a high dynamic range. Measurements of both the aperture efficiency and beam overlap between adjacent pixels demonstrated that the fabricated chessboard FPA improves gain at the edge-of-coverage by 1.2dB compared to an ideal hexagonal FPA of uniform feeds. The chessboard configuration therefore combines state-of-the-art focal plane sampling with minimal penalty in antenna efficiency.
Building on these results, we designed a quasi-optical system to validate the imaging performance of the CMOS-integrated FPA in a practical scenario. Since the Schottky diodes in the FPA did not enable passive imaging, active illumination of the sample was required to achieve sufficient imaging dynamic range. The quasi-optical system was optimized to ensure that the imaging resolution was dictated solely by the focal plane sampling in the chessboard FPA, while maintaining sufficient coupling between all pixels and the active source. Using this system, we performed an imaging demonstration of an ivy leaf hidden in an envelope, further emphasizing the state-of-the-art spatial resolution of the chessboard FPA.
While the CMOS-integrated chessboard FPA demonstrated excellent spatial resolution, its temperature sensitivity was insufficient for passive imaging. To overcome this limitation, we designed the chessboard FPA in a 130-nm SiGe BiCMOS process, utilizing heterojunction bipolar transistors (HBTs) to implement the direct detectors. The implemented chessboard FPA operates between 250 GHz – 600 GHz, and features detectors employing deeply saturated HBTs in a common-base configuration. The prototype was characterized using the quasi-optical system designed for the imaging demonstration. Measurements of the radiation patterns and responsivity showed good agreement with simulations, although the noise-equivalent power was higher than expected. Nevertheless, it is still competitive with the state-of-the-art and should enable passive THz imaging. The noise-equivalent temperature difference was estimated to be 1.6K for a 1 s integration time.
A critical challenge for passive THz cameras is low-frequency noise injected by the direct detectors. To address this, we proposed a solid-state chopper based on a reconfigurable periodic surface. The chopping operation is realized by electronically controlling the transmission through this surface, which is both more compact and faster than a mechanical chopping wheel, while preserving the spatial sampling of the chessboard FPA. The chopper was implemented in 130-nm SiGe BiCMOS and consists of sub-wavelength metal patches in a chessboard geometry loaded with varactor-connected MOSFETs. For characterization, a quasi-optical system was developed, consisting of two elliptical silicon lenses with the chopper located at the shared focus. Measurements showed that the chopper transmission was significantly lower than simulated. When using impedance measurements of a single MOSFET device to re-simulate the chopper, a considerably better match with simulations was obtained. To achieve the desired chopper performance, an alternative implementation was designed based on the measured impedance of an HBT-based load. Although this design has not yet been fabricated, simulations indicate it should enable passive imaging performance when combined with a state-of-the-art antenna-coupled direct detector. Since this design is based on device measurements, there is a high confidence that this proposed chopper design contributes towards the realization of a compact, passive THz camera with near diffraction-limited resolution.
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To explore the realization of such a camera, we first extensively characterized a previously proposed chessboard FPA that was designed to achieve a near diffractionlimited resolution. This chessboard FPA was integrated with direct detectors based on Schottky diodes in 22-nm CMOS, and operates from 200 GHz to 600 GHz. Characterization was performed using an over-the-air measurement setup, enabling 2-D, multi-beam pattern characterization with a high dynamic range. Measurements of both the aperture efficiency and beam overlap between adjacent pixels demonstrated that the fabricated chessboard FPA improves gain at the edge-of-coverage by 1.2dB compared to an ideal hexagonal FPA of uniform feeds. The chessboard configuration therefore combines state-of-the-art focal plane sampling with minimal penalty in antenna efficiency.
Building on these results, we designed a quasi-optical system to validate the imaging performance of the CMOS-integrated FPA in a practical scenario. Since the Schottky diodes in the FPA did not enable passive imaging, active illumination of the sample was required to achieve sufficient imaging dynamic range. The quasi-optical system was optimized to ensure that the imaging resolution was dictated solely by the focal plane sampling in the chessboard FPA, while maintaining sufficient coupling between all pixels and the active source. Using this system, we performed an imaging demonstration of an ivy leaf hidden in an envelope, further emphasizing the state-of-the-art spatial resolution of the chessboard FPA.
While the CMOS-integrated chessboard FPA demonstrated excellent spatial resolution, its temperature sensitivity was insufficient for passive imaging. To overcome this limitation, we designed the chessboard FPA in a 130-nm SiGe BiCMOS process, utilizing heterojunction bipolar transistors (HBTs) to implement the direct detectors. The implemented chessboard FPA operates between 250 GHz – 600 GHz, and features detectors employing deeply saturated HBTs in a common-base configuration. The prototype was characterized using the quasi-optical system designed for the imaging demonstration. Measurements of the radiation patterns and responsivity showed good agreement with simulations, although the noise-equivalent power was higher than expected. Nevertheless, it is still competitive with the state-of-the-art and should enable passive THz imaging. The noise-equivalent temperature difference was estimated to be 1.6K for a 1 s integration time.
A critical challenge for passive THz cameras is low-frequency noise injected by the direct detectors. To address this, we proposed a solid-state chopper based on a reconfigurable periodic surface. The chopping operation is realized by electronically controlling the transmission through this surface, which is both more compact and faster than a mechanical chopping wheel, while preserving the spatial sampling of the chessboard FPA. The chopper was implemented in 130-nm SiGe BiCMOS and consists of sub-wavelength metal patches in a chessboard geometry loaded with varactor-connected MOSFETs. For characterization, a quasi-optical system was developed, consisting of two elliptical silicon lenses with the chopper located at the shared focus. Measurements showed that the chopper transmission was significantly lower than simulated. When using impedance measurements of a single MOSFET device to re-simulate the chopper, a considerably better match with simulations was obtained. To achieve the desired chopper performance, an alternative implementation was designed based on the measured impedance of an HBT-based load. Although this design has not yet been fabricated, simulations indicate it should enable passive imaging performance when combined with a state-of-the-art antenna-coupled direct detector. Since this design is based on device measurements, there is a high confidence that this proposed chopper design contributes towards the realization of a compact, passive THz camera with near diffraction-limited resolution.
This work presents a chessboard focal plane array (FPA) camera with state-of-the-art thermal and spatial resolution in the 200 600 GHz frequency range. The FPA is implemented in a 130-nm SiGe BiCMOS technology, where each antenna element is loaded with a direct detector based on heterojunction bipolar transistors (HBTs). The antenna and detector architecture, including the vias and biasing network, were optimized to achieve a noise-equivalent power (NEP) suitable for passive THz imaging. Overall, the estimated loss of the FPA is better than 4 dB between 350 and 600 GHz, of which 1.5 dB is due to ohmic losses in the FPA, 1 dB to mutual coupling between detectors, and 0.7 dB to the impedance mismatch between the detector and antenna. A prototype of 24 pixels was manufactured and mounted on the base of a silicon hyperhemispherical lens with an anti-reflection coating. Excellent spatial resolution is achieved through a tight element spacing in the fabricated FPA, which is only half the wavelength in silicon at 350 GHz and therefore consistent with the state-of-the-art. Its responsivity, noise, and radiation patterns were characterized using a quasi-optical measurement setup. The measured radiation patterns are within 1 dB of simulations, demonstrating that the integrated THz camera achieves excellent spatial resolution. Between 330 GHz and 500 GHz, the NEP was measured to be on the order of 10 pW/vHz. When considering the entire operational band, this NEP results in a noise-equivalent temperature difference (NETD) of the camera is 1.6 K for an integration time of 1 s per pixel, which is comparable to the state-of-the-art. While THz detectors with state-of-the-art sensitivity are limited to single-pixel designs, the presented work combines a multi-pixel implementation with competitive sensitivity.
This contribution presents a silicon-integrated focal plane array (FPA) THz camera that achieves passive-level sensitivity and a densely sampled field-of-view. The FPA chip is designed in a 130nm SiGe BiCMOS technology from IHP and consists of a previously presented chessboard array topology with integrated direct detectors. The detectors are realized using a differential pair of heterojunction bipolar transistors in a common-base configuration biased in deep saturation. A silicon, hyper-hemispherical lens is mounted on the chip as a primary focusing element. The maximum responsivity of the camera is simulated to be 680 V/W at 350GHz, and above half this value between 260GHz and 600GHz. Simulations show that the minimum NEP is on the order of 2pW/√HZ, yielding an NETD of 1K for a 150ms integration time. For characterization and future imaging demonstrations, the camera is mounted in a quasi-optical setup, which refocuses the beams from the silicon lens onto an imaging plane. Measurements performed in this setup demonstrate that the camera achieves a responsivity on the order of 550/W, while also realizing a dense focal plane sampling.
In this contribution, we describe a reconfigurable surface, designed in 130um SiGe technology, to realize a fully-electronic, planar chopper aiming at passive terahertz imaging applications. This surface consists of subwavelength metallic patches that are interconnected using FET-based varactors. By switching the bias voltage of the varactors between 0V and 1.2V, the reconfigurable surface can switch between a transmissive and opaque state, respectively. The expected transmissivity is simulated to be between 0.2 and 0.9 over a wide frequency band, from 250 GHz to 550 GHz. This chopping solution would enable a high degree of system integration for future passive terahertz cameras.
The continuous advancements in the coverage and sensitivity of terahertz direct-detector imagers places increasing constraints on the test benches needed for characterization. Already, relative differences on the order of a few decibels are observed between simulated and measured performance in the state-of-the-art literature. This contribution elaborates on our experimental strategies to maximize the characterization accuracy and precision of terahertz direct-detection imagers using a broadband, over-the-air measurement procedure. As a demonstration, four elements within a dense detector array were characterized in the WR2.2 band. By optimizing the modulation frequency in the setup for minimal impact of low-frequency noise and interference, a measurement dynamic range up to 30 dB was achieved, including the path loss over 20 cm. The hardware-to-model agreement of the characterized array is below 1 dB between 325 and 450 GHz.
This article presents the development of a focal plane array (FPA) for terahertz imaging applications with a near diffraction-limited resolution achieved through a very tight sampling of the focal plane. The antenna array is integrated with direct detectors in a 22-nm CMOS technology and operates from 200 to 600 GHz. The tight sampling of the focal plane is realized by using a combination of leaky-wave radiation and a dual-polarized connected array configuration that closely resembles a chessboard. By utilizing both the polarizations in the chessboard design, the number of array elements per unit area is effectively doubled. The geometry of the chessboard array was co-optimized together with that of a silicon elliptical lens to achieve both high aperture efficiency and beam overlap. Measurements in the WR2.2 band of a fabricated demonstrator showed that an aperture efficiency of −4.1 dB was realized at 400 GHz. The average gain roll-off between two diagonally adjacent array elements was measured to be −1.5 dB at 400 GHz. Compared to the reference configuration of an idealized, equivalently sampled hexagonal FPA, the improvement in gain at the edge of coverage yields 1.2 dB, which includes 1.9 dB of ohmic losses in the chessboard array. The agreement between measurements and simulations proved to be within 1 dB from 325 to 475 GHz.
A current-mode direct-digital RF modulator (DDRM)-based transmitter (TX) architecture is proposed in this article for energy-efficient wireless applications. To demonstrate its key principles, a 2×13 bit demonstrator is implemented in a 40-nm CMOS technology. This DDRM can operate standalone or as a driver for a common-gate (CG)/common-base (CB) power amplifier (PA). The proposed DDRM is based on current-steering radio frequency digital-to-analog converters (RFDACs) that feature an extra current division path to allow the generation of the optimum current-mode class-B drive profile for the final CG/CB PA, facilitating energy-efficient TX operation without compromising linearity. For this purpose, the DDRM uses signed-IQ mapping combined with a class-B harmonic rejection (HR) technique. In addition, an advanced dynamic biasing technique is introduced to further enhance the TX line-up efficiency in deep power back-off (PBO) region. The DDRM driver standalone can provide 19.6-dBm RF peak output power. It supports a '160-MHz 256-QAM' signal at 2.4 GHz with an adjacent channel leakage ratio (ACLR) of -40.3 dBc and an error vector magnitude (EVM) of -33 dB, without using any digital pre-distortion (DPD). When connected to a CB SiGe PA, the overall TX line-up achieves an output power of 27 dBm and an overall TX system efficiency of 20%. This DPD-free TX line-up achieves an ACLR of -37.7 dBc and an EVM of -30 dB, respectively, when operating with an '80-MHz 64-QAM' signal at 2.2 GHz.