MS

M.S.K. Seyab

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Authored

18 records found

Temperature impact on NBTI modeling in the framework of technology scaling
Conference paper - M.S.K. Seyab, S. Hamdioui

NBTI modeling in the framework of temperature variation
Conference paper - M.S.K. Seyab, S. Hamdioui

CMOS scaling impacts on reliability, what do we understand?
Conference paper - M.S.K. Seyab, N.Z.B. Haron, S. Hamdioui

NBTI-Aware Nanoscaled Circuit Delay Assessment and Mitigation
Conference paper - M.S.K. Seyab, S. Hamdioui

Trends and challenges of SRAM reliability in the nano-scale era
Conference paper - M.S.K. Seyab, S. Hamdioui

Modeling and Mitigating NBTI in Nanoscale Circuits
Conference paper - M.S.K. Seyab, S. Hamdioui

Temperature dependence of NBTI induced delay
Conference paper - M.S.K. Seyab, S. Hamdioui

Bias temperature instability analysis, monitoring and mitigation for nano-scaled circuits
Doctoral thesis - M.S.K. Seyab

Analyzing combined impacts of parameter variations and BTI in nano-scale logical gates
Conference paper - M.S.K. Seyab, S. Hamdioui

Comparative BTI analysis in nano-scale circuits lifetime

NBTI Monitoring and Design for Reliability in Nanoscale Circuits

Bias temperature instability analysis of FinFET based SRAM cells

BTI Impacts on logical gates in nano-scale CMOS technology

Bias temperature instability analysis in SRAM decoder

ReverseAge: an Online NBTI Combating Technique Using Time Borrowing
Conference paper - M.S.K. Seyab, S. Hamdioui

Incorporating Parameter Variations in BTI Impact on Nano-scale Logical Gates Analysis

Variability and reliability analyses in SRAM decoder
Conference paper - M.S.K. Seyab, S. Hamdioui

Impact of partial resistive defects and bias temperature instability on SRAM decoder reliablity