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C. De Martino
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1
Modern commercial applications increasingly rely on advanced communication and sensing capabilities to make autonomous, real-time decisions. This trend continually pushes the demand for higher data communication rates and finer sensing resolution.
Meeting these requirements using the currently allocated microwave spectrum has become challenging due to limited available bandwidth and the physical constraints associated with longer wavelengths. Consequently, both research and, more recently, commercial applications have been shifting toward higher-frequency spectrum ranges, where wider bandwidths and shorter wavelengths can be exploited. To support this transition, numerous studies have been published in recent years, documenting significant progress in the electronic device development cycle. Nevertheless, despite these advances, several areas still require improvement. This thesis addresses some of the persistent limitations in the measurement and characterization of electronic devices (both before and after fabrication) where the community continues to rely on low-frequency methods, techniques, or data extrapolated from lower frequencies and applied at higher frequencies.... ...
Meeting these requirements using the currently allocated microwave spectrum has become challenging due to limited available bandwidth and the physical constraints associated with longer wavelengths. Consequently, both research and, more recently, commercial applications have been shifting toward higher-frequency spectrum ranges, where wider bandwidths and shorter wavelengths can be exploited. To support this transition, numerous studies have been published in recent years, documenting significant progress in the electronic device development cycle. Nevertheless, despite these advances, several areas still require improvement. This thesis addresses some of the persistent limitations in the measurement and characterization of electronic devices (both before and after fabrication) where the community continues to rely on low-frequency methods, techniques, or data extrapolated from lower frequencies and applied at higher frequencies.... ...
Modern commercial applications increasingly rely on advanced communication and sensing capabilities to make autonomous, real-time decisions. This trend continually pushes the demand for higher data communication rates and finer sensing resolution.
Meeting these requirements using the currently allocated microwave spectrum has become challenging due to limited available bandwidth and the physical constraints associated with longer wavelengths. Consequently, both research and, more recently, commercial applications have been shifting toward higher-frequency spectrum ranges, where wider bandwidths and shorter wavelengths can be exploited. To support this transition, numerous studies have been published in recent years, documenting significant progress in the electronic device development cycle. Nevertheless, despite these advances, several areas still require improvement. This thesis addresses some of the persistent limitations in the measurement and characterization of electronic devices (both before and after fabrication) where the community continues to rely on low-frequency methods, techniques, or data extrapolated from lower frequencies and applied at higher frequencies....
Meeting these requirements using the currently allocated microwave spectrum has become challenging due to limited available bandwidth and the physical constraints associated with longer wavelengths. Consequently, both research and, more recently, commercial applications have been shifting toward higher-frequency spectrum ranges, where wider bandwidths and shorter wavelengths can be exploited. To support this transition, numerous studies have been published in recent years, documenting significant progress in the electronic device development cycle. Nevertheless, despite these advances, several areas still require improvement. This thesis addresses some of the persistent limitations in the measurement and characterization of electronic devices (both before and after fabrication) where the community continues to rely on low-frequency methods, techniques, or data extrapolated from lower frequencies and applied at higher frequencies....
Journal article
(2025)
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Carmine De Martino, Ciro Esposito, Eduard Satoshi Malotaux, Steffen Lehmann, Zhixing Zhao, Sven Mothes, Claudia Kretzschmar, Ehsan Shokrolahzade, Michael Schröter, Marco Spirito
This work presents a structured, CAD-assisted design flow to realize broadband on-wafer calibration structures, validated in the prefabrication phase, and extract the intrinsic device response up to (sub)mm-waves. The strict requirements imposed by the design rule checks (DRCs) of 22 nm CMOS technology are incorporated during the design phase of the fixture by using a scripted connectable tile elements approach. The minimum dimension of a critical feature of the fixture is then identified using a newly defined metric based on the correspondence between the EM field distribution in the fixture versus a non-perturbed case of the same standard (STD) artifact. A simulation test bench environment, augmented with experimental data, is then used to add the uncertainties arising from three main error contributors: vector network analyzer (VNA) receiver noise, probe placement error, and calibration residual errors. Including these errors allows for the generation of pre-silicon numerical uncertainty bounds, which are benchmarked with experimental data using calibration quality metrics and device-level parameters. Measurement results ranging from 1 to 325 GHz are presented to demonstrate the validity of the proposed approach to establish the quality of on-wafer calibration approaches integrated in the back-end of line of Si-based technologies and to validate the compact model of CMOS devices up to (sub)mm-waves.
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This work presents a structured, CAD-assisted design flow to realize broadband on-wafer calibration structures, validated in the prefabrication phase, and extract the intrinsic device response up to (sub)mm-waves. The strict requirements imposed by the design rule checks (DRCs) of 22 nm CMOS technology are incorporated during the design phase of the fixture by using a scripted connectable tile elements approach. The minimum dimension of a critical feature of the fixture is then identified using a newly defined metric based on the correspondence between the EM field distribution in the fixture versus a non-perturbed case of the same standard (STD) artifact. A simulation test bench environment, augmented with experimental data, is then used to add the uncertainties arising from three main error contributors: vector network analyzer (VNA) receiver noise, probe placement error, and calibration residual errors. Including these errors allows for the generation of pre-silicon numerical uncertainty bounds, which are benchmarked with experimental data using calibration quality metrics and device-level parameters. Measurement results ranging from 1 to 325 GHz are presented to demonstrate the validity of the proposed approach to establish the quality of on-wafer calibration approaches integrated in the back-end of line of Si-based technologies and to validate the compact model of CMOS devices up to (sub)mm-waves.
Journal article
(2025)
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E. Shokrolahzade, F. A. Mubarak, J. Wiedmayer, C. De Martino, L. Oberto, F. Sebastiano, M. Spirito
Increasing demand for cryogenic electronics aimed at quantum sensors and computing technologies asks for accurate and quantifiable calibration methods and techniques. In this work, we present a structured approach to generate the nominal RF responses of standard artifacts, enabling wideband vector network analyzer (VNA) calibration algorithms, i.e., short, open, load, and reciprocal (SOLR), at cryogenic temperatures. Moreover, we present an EM simulation strategy to generate the perturbations in the artifacts’ responses based on mechanical fabrication tolerances and calculate an equivalent RF response uncertainty. Both the nominal and perturbed standard responses are computed at (user defined) cryogenic temperatures, by combining thermo-mechanical responses with the electromagnetic solver. A circuit simulator-based measurement model (MM) is used to compute the uncertainties of the cryogenic setups used in this work. Error contributions arising from the propagation of VNA noise, switch nonidealities, calibration artifacts uncertainties, temperature fluctuations, and temperature gradient over the interconnects are included in the MM. For validation, measured results of a coaxial air transmission line at 77 K and 4.2 K are presented and compared with 3-D EM simulation predictions. Finally, the measurement uncertainties are detailed in a budget analysis describing the individual contributions.
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Increasing demand for cryogenic electronics aimed at quantum sensors and computing technologies asks for accurate and quantifiable calibration methods and techniques. In this work, we present a structured approach to generate the nominal RF responses of standard artifacts, enabling wideband vector network analyzer (VNA) calibration algorithms, i.e., short, open, load, and reciprocal (SOLR), at cryogenic temperatures. Moreover, we present an EM simulation strategy to generate the perturbations in the artifacts’ responses based on mechanical fabrication tolerances and calculate an equivalent RF response uncertainty. Both the nominal and perturbed standard responses are computed at (user defined) cryogenic temperatures, by combining thermo-mechanical responses with the electromagnetic solver. A circuit simulator-based measurement model (MM) is used to compute the uncertainties of the cryogenic setups used in this work. Error contributions arising from the propagation of VNA noise, switch nonidealities, calibration artifacts uncertainties, temperature fluctuations, and temperature gradient over the interconnects are included in the MM. For validation, measured results of a coaxial air transmission line at 77 K and 4.2 K are presented and compared with 3-D EM simulation predictions. Finally, the measurement uncertainties are detailed in a budget analysis describing the individual contributions.
In this contribution we present an approach to reduce the error arising from the variations of the lumped load, due to process spread, in probe level calibrations. First, full-wave electromagnetic (EM) simulations are employed to generate the nominal standard responses, then a parametric EM simulation of the load structure is used to generate a parametrized model of the standard. The approach is tested using a Short-Open-Load-Reciprocal calibration algorithm and an impedance standard calibration substrates developed on a 150 mm Quartz wafer (400 pm thick). In this process the high fidelity of the lateral dimension of the fabricated structures, realized using IC Photolithography, allows to confine the variations of the load response to only the thin-film resistor thickness spread. The DC response of the load, measured during the calibration step, is used to identify the specific RF response of the probed load from the parametric model. A complete analysis using full-wave EM simulations accounting for process variation is presented together with a set of experimental data up to 67GHz.
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In this contribution we present an approach to reduce the error arising from the variations of the lumped load, due to process spread, in probe level calibrations. First, full-wave electromagnetic (EM) simulations are employed to generate the nominal standard responses, then a parametric EM simulation of the load structure is used to generate a parametrized model of the standard. The approach is tested using a Short-Open-Load-Reciprocal calibration algorithm and an impedance standard calibration substrates developed on a 150 mm Quartz wafer (400 pm thick). In this process the high fidelity of the lateral dimension of the fabricated structures, realized using IC Photolithography, allows to confine the variations of the load response to only the thin-film resistor thickness spread. The DC response of the load, measured during the calibration step, is used to identify the specific RF response of the probed load from the parametric model. A complete analysis using full-wave EM simulations accounting for process variation is presented together with a set of experimental data up to 67GHz.
In this paper, we present an experimental strategy to analyze the harmonic content of mm-wave frequency extenders using the VNA (absolute) power calibration step, without requiring spectrum analyzers and/or separate downconverters. The spectral purity of the upconverted band of the extenders is a key requirement to enable entirely software-based power control required for the accurate analysis of an (active) device under test. The proposed approach is based on the complementary response provided by the calorimeter-based power meter (i.e. VDI PM5) capable of integrating the entire spectral content of the waveguide band, in respect to the extreme frequency selectivity of the narrow-band mixer-based downconverter of the VNA. This complementary integration bandwidth response allows to compare the two results at each input drive level (at the power calibration setup, in-situ) and link the difference to the increased harmonic content contribution, with respect to the spectral content value at the saturation drive level, i.e. nominal manufacturer specified. The paper presents tests carried out in the WR10 (75–110 GHz) and WR6 band (110–170 GHz). The WR10 resulted in a harmonic contribution on the total output power of a maximum of 0.3 dB down to -33 dBc power back off from saturation level, and less than 1 dB down to -38 dBc while the WR6 the same parameter is less than 1 dB over the entire frequency band excluding the lower frequency points.
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In this paper, we present an experimental strategy to analyze the harmonic content of mm-wave frequency extenders using the VNA (absolute) power calibration step, without requiring spectrum analyzers and/or separate downconverters. The spectral purity of the upconverted band of the extenders is a key requirement to enable entirely software-based power control required for the accurate analysis of an (active) device under test. The proposed approach is based on the complementary response provided by the calorimeter-based power meter (i.e. VDI PM5) capable of integrating the entire spectral content of the waveguide band, in respect to the extreme frequency selectivity of the narrow-band mixer-based downconverter of the VNA. This complementary integration bandwidth response allows to compare the two results at each input drive level (at the power calibration setup, in-situ) and link the difference to the increased harmonic content contribution, with respect to the spectral content value at the saturation drive level, i.e. nominal manufacturer specified. The paper presents tests carried out in the WR10 (75–110 GHz) and WR6 band (110–170 GHz). The WR10 resulted in a harmonic contribution on the total output power of a maximum of 0.3 dB down to -33 dBc power back off from saturation level, and less than 1 dB down to -38 dBc while the WR6 the same parameter is less than 1 dB over the entire frequency band excluding the lower frequency points.
In this contribution, we employ direct calibration/de-embedding approaches to validate the large signal device model of state-of-the-art HBTs and CMOS technologies operating in the mm-wave frequency band WR6. The capability of placing the first tier calibration reference plane in close proximity to the DUT allows the large signal metric to be directly compared with foundry models.
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In this contribution, we employ direct calibration/de-embedding approaches to validate the large signal device model of state-of-the-art HBTs and CMOS technologies operating in the mm-wave frequency band WR6. The capability of placing the first tier calibration reference plane in close proximity to the DUT allows the large signal metric to be directly compared with foundry models.
Conference paper
(2022)
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C. Esposito, C. De Martino, S. Lehmann, Z. Zhao, S. Mothes, C. Kretzschmar, M. Schroter, M. Spirito
In this contribution, We analyze the bandwidth versus accuracy trade-offs of conventional two-step de-embedding approaches, often employed to extract the device model parameters. The accuracy limitation of incorporating the pad/line section of classical DUT test-fixtures into shunt-series complex and frequency-dependent elements is analyzed by means of linear circuit simulations and EM parametric analysis. The de-embedding accuracy is then evaluated by employing 3D surfaces to include both the frequency and the geometrical dependency. To validate the presented analysis, classical device monitoring parameters are extracted versus frequency for the same nMOS device embedded in two different fixtures. One topology only supports pad level calibration, thus including the fixture pad/line section in the de-embedding process. The second topology allows a direct on-Wafer calibration (reference plane set on metal-1 in close proximity to the DUT) thus minimizing the residual parasitics to be removed by the de-embedding step. Experimental data are then presented and compared to simulation test benches to highlight the improved consistency of the extracted model parameters of the metal-1 calibration approach up to 220GHz.
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In this contribution, We analyze the bandwidth versus accuracy trade-offs of conventional two-step de-embedding approaches, often employed to extract the device model parameters. The accuracy limitation of incorporating the pad/line section of classical DUT test-fixtures into shunt-series complex and frequency-dependent elements is analyzed by means of linear circuit simulations and EM parametric analysis. The de-embedding accuracy is then evaluated by employing 3D surfaces to include both the frequency and the geometrical dependency. To validate the presented analysis, classical device monitoring parameters are extracted versus frequency for the same nMOS device embedded in two different fixtures. One topology only supports pad level calibration, thus including the fixture pad/line section in the de-embedding process. The second topology allows a direct on-Wafer calibration (reference plane set on metal-1 in close proximity to the DUT) thus minimizing the residual parasitics to be removed by the de-embedding step. Experimental data are then presented and compared to simulation test benches to highlight the improved consistency of the extracted model parameters of the metal-1 calibration approach up to 220GHz.
Journal article
(2021)
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Sven van Berkel, Satoshi Malotaux, Carmine De Martino, Marco Spirito, Daniele Cavallo, Andrea Neto, Nuria Llombart
A complete system modeling and characterization of a wideband differential terahertz (THz) direct detector, integrated in a commercial CMOS technology, is presented. The detector consists of a recently developed double leaky-slot lens antenna that operates from 200 to 600 GHz in combination with a differential Schottky barrier diode (SBD) direct detection circuit. The proposed methodology, starting from low-frequency measurements on a standalone SBD, is able to adequately model the spectral radiometric performance. The system noise-equivalent power (NEP) is characterized from 325 to 500 GHz in excellent agreement with the proposed system model. The measured NEP, 20 pW/√Hz minimum and 90 pW/√Hz frequency averaged, is compromised with respect to the average NEP of 2.7 pW/√Hz that was initially predicted by simulations using the process design kit (PDK) model, since the available SBDs are operating beyond their cutoff frequency. The diodes and models provided by the PDK proved to be inaccurate in predicting circuit behavior at these high frequencies. By using the proposed analysis and modeling approaches, an accurate wideband antenna–detector codesign could be applied for future passive THz imaging applications based on CMOS technologies.
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A complete system modeling and characterization of a wideband differential terahertz (THz) direct detector, integrated in a commercial CMOS technology, is presented. The detector consists of a recently developed double leaky-slot lens antenna that operates from 200 to 600 GHz in combination with a differential Schottky barrier diode (SBD) direct detection circuit. The proposed methodology, starting from low-frequency measurements on a standalone SBD, is able to adequately model the spectral radiometric performance. The system noise-equivalent power (NEP) is characterized from 325 to 500 GHz in excellent agreement with the proposed system model. The measured NEP, 20 pW/√Hz minimum and 90 pW/√Hz frequency averaged, is compromised with respect to the average NEP of 2.7 pW/√Hz that was initially predicted by simulations using the process design kit (PDK) model, since the available SBDs are operating beyond their cutoff frequency. The diodes and models provided by the PDK proved to be inaccurate in predicting circuit behavior at these high frequencies. By using the proposed analysis and modeling approaches, an accurate wideband antenna–detector codesign could be applied for future passive THz imaging applications based on CMOS technologies.
Journal article
(2021)
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Maria Arias Campo, Katarzyna Holc, Rainer Weber, Carmine De Martino, Marco Spirito, Arnulf Leuther, Simona Bruni, Nuria Llombart
Thanks to the large bandwidth availability, millimeter and sub-millimeter wave systems are getting more attractive to be used in a wide range of applications, such as high-resolution radar or high-speed communications. In this contribution, a new lens antenna in-package solution is presented for the H-band (220320 GHz), including a wideband quartz-cavity leaky-wave feed combined with an air-bridge chip interconnect technology, based on spray coating and laser lithography. This interconnection acts as a wideband, low-loss transition between the GaAs front-end and the quartz antenna, avoiding the use of expensive waveguide split-blocks. An antenna prototype including the interconnect has been manufactured and characterized, validating the full-wave simulated results for the integrated H-band leaky-wave with aperture efficiency higher than 74% over 34% bandwidth, and radiation efficiency higher than 70% over 37% of bandwidth.
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Thanks to the large bandwidth availability, millimeter and sub-millimeter wave systems are getting more attractive to be used in a wide range of applications, such as high-resolution radar or high-speed communications. In this contribution, a new lens antenna in-package solution is presented for the H-band (220320 GHz), including a wideband quartz-cavity leaky-wave feed combined with an air-bridge chip interconnect technology, based on spray coating and laser lithography. This interconnection acts as a wideband, low-loss transition between the GaAs front-end and the quartz antenna, avoiding the use of expensive waveguide split-blocks. An antenna prototype including the interconnect has been manufactured and characterized, validating the full-wave simulated results for the integrated H-band leaky-wave with aperture efficiency higher than 74% over 34% bandwidth, and radiation efficiency higher than 70% over 37% of bandwidth.
Conference paper
(2021)
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C. Esposito, C. De Martino, S. Lehmann, Zhixing Zhao, M. Schroter, M. Spirito
In this contribution we present a simulation test-bench capable of separating and quantifying all the major sources of uncertainties in user-designed direct calibration/de-embedding test-fixtures. The calibrated data systematic errors arising from the different response of the standard definitions when compared to their in-fixture ones as well as the random contributions arising from the instrument noise and probe (variable) misplacement are described and propagated through the calibration equations versus frequency. Finally, the S-parameter uncertainties are further propagated to the device level parameters, i.e., gate capacitance and transducer gain to provide the required link between calibration accuracy and modelling uncertainty. Preliminary measurement data in the 140GHz-220GHz range are compared versus the uncertainty model prediction.
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In this contribution we present a simulation test-bench capable of separating and quantifying all the major sources of uncertainties in user-designed direct calibration/de-embedding test-fixtures. The calibrated data systematic errors arising from the different response of the standard definitions when compared to their in-fixture ones as well as the random contributions arising from the instrument noise and probe (variable) misplacement are described and propagated through the calibration equations versus frequency. Finally, the S-parameter uncertainties are further propagated to the device level parameters, i.e., gate capacitance and transducer gain to provide the required link between calibration accuracy and modelling uncertainty. Preliminary measurement data in the 140GHz-220GHz range are compared versus the uncertainty model prediction.
Journal article
(2020)
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Sven van Berkel, Eduard Satoshi Malotaux, Carmine De Martino, Marco Spirito, Daniele Cavallo, Andrea Neto, Nuria Llombart
The design and performance of two wideband double leaky slot lens antennas, suitable for integration in commercial CMOS technologies, are presented in this article. It is shown that antennas that are of leaky-wave nature are extremely suitable for CMOS integration as the impact of the metal density rules is minimized while simultaneously a dielectric lens can be efficiently illuminated. One antenna, operating over an ultrawide bandwidth from 200 to 600 GHz with a state-of-the-art simulated average efficiency of 57%, is suitable for center-fed direct detection scenarios. As a means of antenna performance verification, a coplanar waveguide (CPW)-fed antenna, which operates from 250 to 500 GHz with an average efficiency of 47%, is designed, fabricated, and characterized. This antenna, which potentially could be interfaced to other on-chip active elements, is fabricated and characterized in terms of S -parameters and gain patterns with excellent agreement with simulation, thanks to the use of an ad hoc quasi-optical measurement setup.
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The design and performance of two wideband double leaky slot lens antennas, suitable for integration in commercial CMOS technologies, are presented in this article. It is shown that antennas that are of leaky-wave nature are extremely suitable for CMOS integration as the impact of the metal density rules is minimized while simultaneously a dielectric lens can be efficiently illuminated. One antenna, operating over an ultrawide bandwidth from 200 to 600 GHz with a state-of-the-art simulated average efficiency of 57%, is suitable for center-fed direct detection scenarios. As a means of antenna performance verification, a coplanar waveguide (CPW)-fed antenna, which operates from 250 to 500 GHz with an average efficiency of 47%, is designed, fabricated, and characterized. This antenna, which potentially could be interfaced to other on-chip active elements, is fabricated and characterized in terms of S -parameters and gain patterns with excellent agreement with simulation, thanks to the use of an ad hoc quasi-optical measurement setup.
Conference paper
(2020)
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Akshay Visweswaran, Alexander Haag, Carmine De Martino, Karina Schneider, Tim Maiwald, Bastien Vignon, Klaus Aufinger, Marco Spirito, Thomas Zwick, Piet Wambacq
We present a 132-147GHz power source based on four power amplifiers whose outputs are combined into a compact (0.52x0.48mm2 footprint) dielectric resonator antenna mounted on the chip face. The source, prototyped in 0.13μm SiGe BiCMOS, demonstrates an EIRP of 27dBm with a power-added efficiency of 13.8 %. Individual PAs deliver a peak Psat of 15dBm over a 3-dB bandwidth of 116-152GHz. Excited by shorted patches on chip, the maximum efficiency of the hybrid antenna is 80% over a 16% relative bandwidth. The EIRP and transmitted RF power are the highest reported for D-band silicon-based transmitters.
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We present a 132-147GHz power source based on four power amplifiers whose outputs are combined into a compact (0.52x0.48mm2 footprint) dielectric resonator antenna mounted on the chip face. The source, prototyped in 0.13μm SiGe BiCMOS, demonstrates an EIRP of 27dBm with a power-added efficiency of 13.8 %. Individual PAs deliver a peak Psat of 15dBm over a 3-dB bandwidth of 116-152GHz. Excited by shorted patches on chip, the maximum efficiency of the hybrid antenna is 80% over a 16% relative bandwidth. The EIRP and transmitted RF power are the highest reported for D-band silicon-based transmitters.
Journal article
(2020)
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Carmine De Martino, Luca Galatro, Raffaele Romano, Gaetano Parisi, Marco Spirito
In this article, we present a comprehensive analysis of the hardware and software solutions required to enable frequency scalable load-pull test benches operating in the (sub)mm-wave frequency bands. First, the constraints arising from the harmonic (nonlinear) operation of mm-wave extender modules are discussed and analyzed. Then, different hardware solutions for signal generation and control, together with the specific software algorithms required to realize a frequency scalable load-pull test bench, are presented. The measurement setup key performances are analyzed in different frequency bands up to 500 GHz, i.e., waveguide bands from WR10 up to WR2.2. Finally, the load-pull measurements on an HBT device at 75 GHz and a two-stage differential PA at 135 GHz are presented to show the capability of the proposed test bench to characterize and optimize mm-wave nonlinear components.
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In this article, we present a comprehensive analysis of the hardware and software solutions required to enable frequency scalable load-pull test benches operating in the (sub)mm-wave frequency bands. First, the constraints arising from the harmonic (nonlinear) operation of mm-wave extender modules are discussed and analyzed. Then, different hardware solutions for signal generation and control, together with the specific software algorithms required to realize a frequency scalable load-pull test bench, are presented. The measurement setup key performances are analyzed in different frequency bands up to 500 GHz, i.e., waveguide bands from WR10 up to WR2.2. Finally, the load-pull measurements on an HBT device at 75 GHz and a two-stage differential PA at 135 GHz are presented to show the capability of the proposed test bench to characterize and optimize mm-wave nonlinear components.
Conference paper
(2020)
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Luca Galatro, Carmine De Martino, Jos van 't Hof, Mohammed Alomari, Holger Sailer, Joachim Burghartz, Marco Spirito
In this contribution we present the developments and current performance of calibration substrates manufactured on 150 mm Quartz wafers (675 μm thick) based on a CMOS process technology. The passive structures required to realize on-wafer vector network analyzer calibration standards are benchmarked against commercially available (i.e., Alumina) substrates. First, an analysis of the process stability is presented for both reflective and resistive impedances across the entire wafer (i.e., 24 dies). Full-wave EM simulations are employed to realize accurate calibration artefact models aiming to achieve state-of-the-art calibration accuracy. The calibration quality in finally benchmarked on an independent line realized in the back-end-of-line of a Silicon based technology up to 67.5 GHz.
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In this contribution we present the developments and current performance of calibration substrates manufactured on 150 mm Quartz wafers (675 μm thick) based on a CMOS process technology. The passive structures required to realize on-wafer vector network analyzer calibration standards are benchmarked against commercially available (i.e., Alumina) substrates. First, an analysis of the process stability is presented for both reflective and resistive impedances across the entire wafer (i.e., 24 dies). Full-wave EM simulations are employed to realize accurate calibration artefact models aiming to achieve state-of-the-art calibration accuracy. The calibration quality in finally benchmarked on an independent line realized in the back-end-of-line of a Silicon based technology up to 67.5 GHz.
Conference paper
(2020)
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J. van 't Hof, C. De Martino, S. Malotaux, M. Squillante, M. Marchetti, L. Galatro, M. Spirito
In this contribution we present a method for estimating linearity performance of devices operating in the higher millimeter-wave region, under modulated signals and over different loading conditions. The proposed method uses the power dependent vector gain extracted during continuous-wave large signal (load pull) measurements. The EVM prediction capability of the method is benchmarked with experimental load pull data with realistic modulated signals (QAM16) in the 5 GHz (RF) and in the 26 GHz (5G) bands on a 22nm CMOS FD-SOI device. The EVM estimated by the model correlates to the load pull measurements under complex modulated stimulus and properly predicts the best loading condition for linearity. Finally, the proposed method is used to estimate the EVM performance (QAM16) and the optimal loading condition for a 22nm CMOS-SOI device operating in the higher millimeter-wave region, at 165 GHz.
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In this contribution we present a method for estimating linearity performance of devices operating in the higher millimeter-wave region, under modulated signals and over different loading conditions. The proposed method uses the power dependent vector gain extracted during continuous-wave large signal (load pull) measurements. The EVM prediction capability of the method is benchmarked with experimental load pull data with realistic modulated signals (QAM16) in the 5 GHz (RF) and in the 26 GHz (5G) bands on a 22nm CMOS FD-SOI device. The EVM estimated by the model correlates to the load pull measurements under complex modulated stimulus and properly predicts the best loading condition for linearity. Finally, the proposed method is used to estimate the EVM performance (QAM16) and the optimal loading condition for a 22nm CMOS-SOI device operating in the higher millimeter-wave region, at 165 GHz.
A method is presented for automated probing of on-wafer devices for measurements at millimetre-wave frequencies. The proposed method automatically detects the contact between the measurement probe and on-wafer device, based on the evaluation of variation in the input reflection coefficient. It is shown that, using this automated technique, about five times better measurement repeatability is achieved in millimetre-wave device characterisation.
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A method is presented for automated probing of on-wafer devices for measurements at millimetre-wave frequencies. The proposed method automatically detects the contact between the measurement probe and on-wafer device, based on the evaluation of variation in the input reflection coefficient. It is shown that, using this automated technique, about five times better measurement repeatability is achieved in millimetre-wave device characterisation.
Conference paper
(2020)
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S.L. van Berkel, E.S. Malotaux, C. de Martino, M. Spirito, D. Cavallo, A. Neto, N. Llombart
The predicted Noise Equivalent Power (NEP) of a THz direct detector is validated by means of a noise- and a system responsivity measurement. The direct detector consists of a double leaky slot lens antenna that operates from 200 GHz to 600 GHz in combination with a differential pair of Schottky Barrier Diodes (SBDs). The model is derived from low-frequency measurements.
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The predicted Noise Equivalent Power (NEP) of a THz direct detector is validated by means of a noise- and a system responsivity measurement. The direct detector consists of a double leaky slot lens antenna that operates from 200 GHz to 600 GHz in combination with a differential pair of Schottky Barrier Diodes (SBDs). The model is derived from low-frequency measurements.
In this paper, the enabling of the standard configuration of the mm-Wave VNA to perform Over-The-Air antenna characterization is presented. The measurement setup proposed allows to fully characterizing the different type of on-chip antennas thank the vector power calibration and the phase calibration. In fact, using the power calibration, the setup allows measuring the absolute value of the power at the calibration reference planes directly using the VNA’s receivers. Adding the phase calibration to the calibration procedure enables the measurement setup to provide two phase-coherent sources (at port1 and port2) allowing the characterization of a combining active fed on-chip antenna. Measurements of a stand-alone antenna from 220 to 500 GHz and of a combining active fed on-chip antenna among the frequency (from 130 to 155 GHz) and among the relative phase variation (from 0 to 70 degrees) are presented. The measurement results, in the first case, show a very good agreement with simulation while, in the second case, show the capability of the setup to control the relative phase of its two ports.
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In this paper, the enabling of the standard configuration of the mm-Wave VNA to perform Over-The-Air antenna characterization is presented. The measurement setup proposed allows to fully characterizing the different type of on-chip antennas thank the vector power calibration and the phase calibration. In fact, using the power calibration, the setup allows measuring the absolute value of the power at the calibration reference planes directly using the VNA’s receivers. Adding the phase calibration to the calibration procedure enables the measurement setup to provide two phase-coherent sources (at port1 and port2) allowing the characterization of a combining active fed on-chip antenna. Measurements of a stand-alone antenna from 220 to 500 GHz and of a combining active fed on-chip antenna among the frequency (from 130 to 155 GHz) and among the relative phase variation (from 0 to 70 degrees) are presented. The measurement results, in the first case, show a very good agreement with simulation while, in the second case, show the capability of the setup to control the relative phase of its two ports.
In this paper we present a method to alleviate the errors introduced by the bias dependency of the electrostatic discharge or antenna-effect protection diodes when a direct metal-one TRL calibration is employed. The proposed method shows that the two error-boxes produced by the TRL algorithm can be split and combined without introducing mathematical errors as long as the perturbation can be assumed to be a reciprocal network. A mathematical analysis is provided and initially bench marked against a circuit level simulation employing only s-parameter defined error boxes and ideal lumped components and after verified using 3D EM simulations of the test fixtures. The circuit level simulator confirms the mathematical analysis while the 3D EM simulator validates the applicability in a more realistic setting. Finally, the proposed method is used in a real measurement where the test fixture are implemented in a 28nm CMOS technology and characterized at frequencies between 140 GHz to 200 GHz. The measurement using the proposed method clearly shows reduced deviation from known reference when compared to the non-split approach.
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In this paper we present a method to alleviate the errors introduced by the bias dependency of the electrostatic discharge or antenna-effect protection diodes when a direct metal-one TRL calibration is employed. The proposed method shows that the two error-boxes produced by the TRL algorithm can be split and combined without introducing mathematical errors as long as the perturbation can be assumed to be a reciprocal network. A mathematical analysis is provided and initially bench marked against a circuit level simulation employing only s-parameter defined error boxes and ideal lumped components and after verified using 3D EM simulations of the test fixtures. The circuit level simulator confirms the mathematical analysis while the 3D EM simulator validates the applicability in a more realistic setting. Finally, the proposed method is used in a real measurement where the test fixture are implemented in a 28nm CMOS technology and characterized at frequencies between 140 GHz to 200 GHz. The measurement using the proposed method clearly shows reduced deviation from known reference when compared to the non-split approach.
In this paper we present the measurement procedure to achieve direct on-wafer absolute power calibration in VNA-based mm-wave setups. The proposed approach employs 28 nm CMOS n-channel MOSFET as the power calibration transfer device, providing sufficient responsivity up to 325 GHz. The square law conversion from mm-wave (power) to DC (voltage) through the CMOS device is employed to achieve a direct on-wafer power calibration. The use of the calibration transfer device allows for a (power) calibration procedure of a mm-wave measurement setup with zero extender movements, thus minimizing errors originating from cable movements, and reducing calibration time when compared to the standard, calorimeter based, procedure. The approach is experimentally benchmarked against the instrumentation power meters procedure in the WR5 band (140220 GHz), showing a maximum error propagated through the calibration equations, over the entire band and multiple devices, lower than 1 dB.
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In this paper we present the measurement procedure to achieve direct on-wafer absolute power calibration in VNA-based mm-wave setups. The proposed approach employs 28 nm CMOS n-channel MOSFET as the power calibration transfer device, providing sufficient responsivity up to 325 GHz. The square law conversion from mm-wave (power) to DC (voltage) through the CMOS device is employed to achieve a direct on-wafer power calibration. The use of the calibration transfer device allows for a (power) calibration procedure of a mm-wave measurement setup with zero extender movements, thus minimizing errors originating from cable movements, and reducing calibration time when compared to the standard, calorimeter based, procedure. The approach is experimentally benchmarked against the instrumentation power meters procedure in the WR5 band (140220 GHz), showing a maximum error propagated through the calibration equations, over the entire band and multiple devices, lower than 1 dB.