Ethylene (C2H4) is an important volatile organic compound (VOC) with applications in agriculture, environmental monitoring, and industrial processes. In this work, graphene was investigated as a material for gas sensing applications. To improve the selectivity of graphene toward ethylene, the graphene surface was functionalized using nanoparticles. Graphene-based sensor devices were successfully fabricated and subsequently characterized using Raman spectroscopy, Scanning Electron Microscopy (SEM), and electrical measurements. The characterization results confirmed the successful fabrication of graphene devices and demonstrated that the nanoparticle functionalization process caused limited damage to the graphene. Gas sensing measurements further showed that both pristine and nanoparticle-functionalized graphene devices were capable of detecting ethylene gas. However, within the conditions investigated in this work, the selected nanoparticle functionalizations did not
result in an improvement in ethylene sensitivity compared to non-functionalized graphene. Future work could focus on investigating alternative nanoparticle material or operating the sensors at elevated temperatures.

Silicon carbide (SiC) is a wide-bandgap semiconductor with excellent resistance to harsh environments, making it well-suited for high-temperature electronics. Due to its similarities to silicon, silicon carbide processing for CMOS can leverage existing silicon manufacturing methods. However, SiC CMOS production remains in early development and requires robust, conservative circuit design. This thesis presents the design and simulation of an eight-bit analog-to-digital converter (ADC) targeted for operation up to 500 °C. Simulations without mismatch modeling predict a maximum integral and differential nonlinearity of less than 0.3 LSB, and an effective resolution of 7.89 bits at 200 °C. The ADC is to be fabricated in a 2 µm SiC CMOS process developed by Fraunhofer IISB. If measurement results validate the design, this ADC would represent the highest-resolution monolithically integrated ADC demonstrated above 300 °C. In addition to the ADC design, measurements of SiC CMOS logic gates show low fabrication yield, contrary to previous measurements of Fraunhofer IISB SiC CMOS circuits. Failure analysis attributed this to defects in the metallization layers.

Air pollutants like NO2 are harmful in small concentrations, and gas sensors are needed that can detect gases in such low quantities. A promising candidate for this is doping graphene, a single layer of carbon atoms, with nitrogen impurities, and using this material as a chemoresistor. This thesis investigates the fabrication and characterization of this nitrogen-doped graphene (NDG) in a low-pressure chemical vapor deposition (LPCVD) process. This is first tested with a mixture of methane and ammonia gas as carbon and nitrogen precursors respectively. After this is proven to be ineffective, a benzene-like liquid called pyridine is bubbled into the reactor to supply both the carbon and nitrogen, and grow graphene on both copper and molybdenum catalysts. The graphene is characterized by Raman spectroscopy, SEM, FTIR, EDX and XPS measurements. The CVD parameters are changed to optimize the quality of the grown graphene. The nitrogen doping couldn't be confirmed, but a CVD recipe is now available to grow graphene with pyridine, manufacture a gas sensor with this new material and conduct NO2 gas tests to measure the sensor's sensitivity.

This report presents the design and implementation of an automated image-acquisition module for the FEI XL30 SFEG Scanning Electron Microscope (SEM). Older SEM models such as the XL30 lack built-in functionality for long-duration, unattended imaging, limiting researchers to manually capturing frames or taking only sparse images across an experiment. To address this limitation, a Python-based control subsystem was developed that communicates with the SEM via its RS232 serial interface and coordinates with an image-processing subsystem. Since samples may drift at high magnification levels during long-duration imaging, a drift correction feedback loop was implemented. The loop ensures that the region of interest is always kept in the centre of the frame, by both software stabilization and beam shift correction. A custom message protocol, robust error-handling framework, and graphical user interface were implemented to ensure reliable operation within the constraints of a legacy Windows 2000/Windows 7 environment. The resulting system enables stable, long-duration SEM video acquisition without the need for user supervision.

This thesis addresses the challenge of generating long-duration, high-quality videos using the XL30 FEG/SFEG/SIRION Scanning Electron Microscope (SEM), a task traditionally hindered by slow acquisition speeds, sample drift, and the absence of automated frame scheduling. As a result, researchers lack practical tools to observe nanoscale dynamics over extended experiments. The goal of the project for this subsystem was to develop an image-processing pipeline capable of stabilising SEM recordings and enabling automated video creation from sequential still images. To achieve this, software was developed to process frames acquired at user-defined intervals, correct drift, and assemble images into a cohesive video. Drift was mitigated through a dual-layer strategy: small displacements were compensated using purely software based frame stabilisation techniques, while larger misalignments were addressed by calculating beam shift vectors to support mechanical correction in collaboration with the SEM Control subsystem. The drift between two images was calculated using a phase correlation based algorithm. The resulting prototype successfully stabilised long image sequences and produced smooth, high-definition SEM videos, even in the presence of significant sample drift. These outcomes demonstrate the feasibility of automated SEM video generation and provide a modular framework that can be extended with improved robustness for challenging imaging conditions.

Silicon carbide (SiC) is a wide-bandgap semiconductor with excellent thermal stability, high breakdown voltage, and robustness under harsh environments, making it well-suited for high-temperature digital logic applications. Compared with conventional silicon, SiC devices maintain reliable operation at significantly higher temperatures due to their strong electric field tolerance and reduced leakage characteristics. However, as an emerging technology, its integration level for digital circuits is still in a preliminary stage and requires validation through a full chip design and fabrication process.
This thesis presents the design and simulation of a fully functional 4-bit RISC processor in a 2 µm SiC CMOS process developed by Fraunhofer IISB. The processor includes the implementation of the ALU, program counter, control unit, and memory blocks, together with validation of its functionality and performance through circuit-level simulations across a wide temperature range. Results demonstrate stable operation and robustness up to 500◦C, as well as reliable logic performance at clock frequencies up to 750 kHz. The work further establishes a foundation for future digital systems based on the Fraunhofer IISB SiC CMOS process, paving the way toward more complex architectures such as 16-bit processors for real-world harsh-environment applications.

The ability to quantify ion transport in a dielectric is of major interest for the development of reliable biomedical devices. A novel and scalable method for accomplishing this is established in this thesis. As ions from the gate of an electrolyte-gated field-effect transistor (EGFET) ingress into the gate dielectric, they induce a charge in the channel. The developed method works by replacing the gate dielectric with a layer under test (LUT), measuring the induced charge, and relating it to ion transport parameters. Scalability is achieved with a silicon-based sensor die on which the LUT can be deposited and an easy-to-use experimental setup. Four different EGFET devices and an integrated biasing technique are incorporated on the die to ensure functionality across a wide range of LUTs, ion species, and experimental conditions. Based on a drift–diffusion transport model, a novel working model was developed, which enables extraction of ion diffusion coefficients independently of experimental conditions. Together, the sensor, setup and model form a versatile and scalable platform for studying various combinations of LUTs and ion species.

Carbon dioxide (CO₂) detection is vital in various fields, such as environmental monitoring, healthcare, and industry. Metal oxides are the sensing material because of their high sensitivity and stability. However, they have limitations in detecting CO₂ as CO₂ is a chemically stable gas, which can be mitigated by post-treatment such as annealing or doping noble metals. Spark ablation, a versatile technique for synthesizing nanoparticles with controlled size and composition, was utilized in this study to produce SnO₂ nanoparticles, which were subsequently integrated into a specifically designed interdigitated electrode (IDE) structure for CO₂ sensing. The IDE configuration featured a fixed finger width of 5 μm, with the gap width ranging from 2 to 15 μm, and devices were fabricated with SnO₂ sensing areas of 1×1 cm and 1×4 cm. Noble metals such as Ag and Ru were decorated on the SnO₂ layer to enhance the catalytic activity and promote the CO₂ adsorption reaction. Surface densities of Ag and Ru under various printing conditions were analyzed using spark ablation. Based on these results, decorated SnO₂ layers were fabricated with surface coverages of 19% Ag and 12% Ru, respectively. Annealing was performed later at 450°C and 600°C, and XRD results revealed that the grain size of SnO₂ increased from 7 nm at 450°C to 12 nm at 600°C. Gas tests conducted in an N₂ atmosphere demonstrated CO₂ detection at 200°C, with a higher response observed for samples with Ru nanoparticle decoration, approximately twice that of the undecorated sample. However, no recovery was observed. Overall, samples annealed at 450°C exhibited higher responses compared to the ones annealed at 600°C. In an N₂/O₂ atmosphere, the sensor exhibited almost no response to CO₂. Further investigation revealed a response to O₂, suggesting that the low operating temperature may hinder the reaction between CO₂ and adsorbed oxygen species, failing CO₂ sensing. An anomalous p-conductive behaviour was also observed in response to O₂. Experimental results showed no correlation between device area, gap width, and sensing performance.

Deposited dielectrics with low loss at millimeter-submillimeter (mm-submm) wavelengths are beneficial for the development of superconducting integrated circuits (ICs) for astronomy, such as filter banks, on-chip Fourier-transform spectrometers, and kinetic inductance parametric amplifiers. Although it is possible to fabricate microstrip lines using crystalline Si extracted from a silicon-on-insulator wafer by a flip-bonding process, deposited dielectrics al- low for simpler and more flexible chip designs and fabrication routes. In the ∼10–100 THz frequency range, dielectric losses are typically dominated by infrared absorption due to vibrational modes, whereas in the microwave fre- quency band (∼1–10 GHz) and at sub-Kelvin temperatures the dielectric loss is typically dominated by absorption due to two-level systems (TLSs). How- ever, the origin of the mm-submm (∼0.1–1 THz) loss in deposited dielectrics was unknown. In this dissertation we show that the mm-submm loss in de- posited dielectrics can be explained by the absorption tail of vibrational modes which are located above 10 THz. Furthermore, we found that hydrogenated amorphous silicon carbide (a-SiC:H) has a very low mm-submm loss tangent of 1.3×10−4 at 350 GHz, which makes it a promising low-loss deposited dielectric for mm-submm superconducting integrated circuits.

Based on a literature study we identified a-SiC:H and hydrogenated amor- phous silicon (a-Si:H) as potentially promising low-loss dielectrics. In order to find the origin of the mm-submm loss, and to define which materials we investi- gated in this PhD project, we characterized the dielectrics’ material properties at room temperature prior to performing the cryogenic loss measurements. We deposited a-SiC:H at a substrate temperature Tsub of 400◦C using plasma- enhanced chemical vapor deposition (PECVD), and we deposited the a-Si:H films at Tsub of 100◦C, 250◦C, and 350◦C. We characterized the films’ material properties using Fourier-transform infrared spectroscopy (FTIR), Raman spec- troscopy and ellipsometry. For the a-Si:H we determined the hydrogen content and the microstructure parameter from the FTIR data, the bond-angle disorder from the Raman data, and the void volume fraction from the ellipsometry data. For both the a-Si:H and the a-SiC:H we determined the band gap and optical refractive index from the ellipsometry data, and the infrared refractive index from the FTIR data. From the Raman spectra we observed that the a-SiC:H and the a-Si:H films were amorphous. Furthermore, we performed electron diffraction spectroscopy to determine the Si to C ratio of the a-SiC:H. For the a-Si:H we found that the all the material properties depend monotonically on Tsub. Additionally, we measured the cryogenic microwave loss of the a-Si:H films, but we found no correlation between the microwave loss and Tsub.

No cryogenic mm-submm and microwave loss data was available for a- SiC:H. We measured the low-power and cryogenic microwave loss of the a- SiC:H and found that the microwave loss tangent (tanδ ∼ 10−5) is compa- rable to the loss of a-Si:H. Furthermore, we measured the mm-submm loss in the range of 270–385 GHz using an on-chip Fabry-Pérot experiment. The observed mm-submm losss value of 1.2 × 10−4 at 350 GHz was significantly lower than what was reported for a-Si:H, which previously exhibited the low- est reported microwave and mm-subm wave loss values among the deposited dielectrics which are commonly used in superconducting ICs. Furthermore, we found that the mm-submm loss of the a-SiC:H increases monotonically with frequency. This was surprising in the framework of TLSs and led us to the hypothesis that another loss mechanism than TLSs might be dominant at mm- submm wavelengths. In addition to the low losses, the a-SiC:H was found to be beneficial thanks to its very low stress, lack of blisters, and the possibility to fabricate a membrane from the a-SiC:H on a c-Si wafer.

To study the origin of the frequency dependent mm-submm loss in the a- SiC:H, we extended the on-chip Fabry-Pérot experiment to the 270–600 GHz range by making use of a wideband leaky antenna. Additionally, we measured the complex dielectric constant of the a-SiC:H in the 3–100 THz range using Fourier-transform spectroscopy (FTS). We modeled the FTS data using the Maxwell-Helmholtz-Drude (MHD) dispersion model and obtained the complex dielectric constant in the 3-100 THz range. Finally, we modeled the combined on-chip loss data from the Fabry-Pérot experiments and the FTS data by fitting the MHD dispersion model in the frequency range of 0.27–100 THz. Our model demonstrates that the mm-submm loss in the a-SiC:H above 200 GHz can be explained by the absorption tail of vibrational modes which are located above 10 THz. These results pave the way for a thorough understanding of the mm-submm loss in deposited dielectrics.

The low losses of the a-SiC:H allow for integrated superconducting spec- trometers with a large frequency bandwidth and relatively high resolving pow- ers without sacrificing too much optical efficiency. This has led to the application of the a-SiC:H in the DESHIMA 2.0 filter bank, which has seen first light in 2023 at the ASTE telescope in the Atacama Desert.

Graphene, despite its exceptional electrical properties, is not suitable as a channel material in field-effect transistors due to its zero band gap. Engineered graphene structures, such as graphene nanoribbons, have been proposed to overcome this limitation. However, nanoribbons, while offering an opened band gap and favourable current on/off ratios, suffer from low individual driving currents. Graphene nanomesh provides a potential solution by maintaining the benefits of nanoribbons while offering higher driving currents due to its two-dimensional structure. However, fabricating graphene nanomesh remains challenging.
This study investigates the fabrication of graphene nanomesh using a transfer-free anodization method with nanoporous anodic alumina as a hard mask in a plasma etching process. Unlike previously published methods, which require the transfer of brittle alumina masks, this work develops a process where anodization is performed directly on aluminium deposited on top of graphene. A two-step anodization process was tested and optimized using aluminium on silicon samples, including the development of a partial stripping variation aimed at preserving pore ordering.
Initial tests on Al-on-Si samples demonstrated promising results, with plasma etching yielding uniform patterns when using the partial stripping technique. However, when applied to graphene samples, significant challenges were encountered. Poor adhesion between aluminium and graphene layers resulted in delamination and bubbling during anodization, disrupting the pore formation process and leading to defects. Efforts to improve adhesion through patterning of the substrate showed no substantial improvements. However, it was confirmed that the Mo and the graphene survived the anodization process.
Although plasma etching produced positive results in regions where delamination was minimized, etching on graphene samples remained inconsistent. Despite these challenges, the study provides valuable insights into the fabrication process, particularly regarding mask stability and adhesion issues.

In the semiconductor industry, the ongoing demand for the miniaturization of electronic devices has significantly increased the number of components integrated into a single wafer. Consequently, the dimensions of interconnects in integrated circuits (ICs) must be minimized to connect more transistors. This trend inevitably leads to a substantial rise in current density within the interconnects, posing a major reliability challenge known as electromigration (EM). EM can result in further reliability issues, ultimately causing device failure. Extensive research has been conducted over the past decades to mitigate the impact of EM.
This study focuses on copper (Cu) interconnects, investigating the effect of annealing on their microstructure and the resulting impact on resistivity, with particular emphasis on how the microstructure influences EM. Additionally, the progress of attempting to forming Cu nanotwins via electroplating to resist EM is briefly investigated. Sputtered Cu was annealed at temperatures of 300℃, 400℃, 500℃, and 700℃, and the resulting microstructural variations were characterized by using EBSD. The findings reveal a progressive strengthening of the (111) texture in Cu film and an increase in grain size with higher annealing temperatures. Additionally, a notable decrease in grain boundary length was observed as the annealing temperature increased, correlating with reduced resistivity across the annealed samples. Moreover, the study highlights a elimination of defects and strain within the Cu films with increasing annealing temperatures.
Furthermore, EM measurements were conducted using accelerated tests under conditions of high current stress and high temperature. The variations in the microstructure of Cu films were described, and the correlation between EM mechanisms and microstructural parameters was discussed. To quantify the progress of EM, the drift velocity for each sample was calculated, revealing a trend of slower drift velocities with increasing annealing temperatures. This work provides a unique opportunity to investigate the impact of annealing on the microstructure of Cu interconnects and to study how these changes influence EM performance. The findings contribute to a deeper understanding of EM and enhanced reliability prediction in electronic devices.

Keywords: electromigration, copper interconnects, microstructure, annealing.

Chip forensics has become an important aspect of law enforcement for retrieving data from data carriers. Improving data encryption techniques, smaller technology nodes and increasing chip design complexity instigate the constant need for new software and hardware hacking methods. The work presented in this thesis investigates the potential of a new hardware hacking method named backside contacting. This method aims to connect a probe to one of the bottom interconnects through the backside to listen to the signals sent over that interconnect.
For this purpose, a recipe has been developed. This recipe is a workflow of numerous processes and steps. Several methods like delayering, cross-sectioning and infra-red (IR) imaging were developed to obtain information about the layout and technology of the chip. Atomic layer deposition (ALD), induction coupled plasma enhanced chemical vapour deposition (ICPECVD) and a focussed ion beam (FIB) were used to create structures on the die, in order to realize a backside interconnect. Finally, various setups were built to test the chip throughout the recipe.
The study shows that each step is possible without losing the data on the chip. The yield of surviving chips after each step, however, should be increased to establish a full backside contact while keeping the chip alive. The study also indicates that there remains considerable potential for improvement within each step. The results are promising and justify further research into the method of backside contacting.

This Bachelor of Science thesis presents the development of a portable readout system for a graphenebased gas sensor array, aiming to bring advanced gas sensing technology from a controlled laboratory environment to practical field applications, such as greenhouses and vineyards. The project focuses on integrating various hardware components into a single printed circuit board (PCB) equipped with a microcontroller, ensuring accurate resistance measurement of graphene strips, generating programmable waveforms for micro hotplate control, and facilitating data communication via USB and Modbus interfaces. The design includes high-resolution analog-to-digital converters (ADCs) for precise current and voltage measurements, a digital-to-analog converter (DAC) for waveform generation, and a robust power management system supporting multiple power inputs. The system supports dual operation modes: interfacing with a desktop for laboratory use and functioning autonomously as an integrated sensor unit. Key challenges addressed include ensuring measurement accuracy, reliable sensor array connectivity, and user-friendly interfacing for both lab and field scenarios. Comprehensive test plans are outlined to verify the system’s performance, focusing on critical requirements such as resistance measurement accuracy, waveform generation, and communication interfaces. The successful implementation of a large part of this readout system demonstrates its potential for enhancing gas detection and monitoring in agricultural applications, providing a scalable solution for future deployment and development.

As advances in silicone CMOS technology steadily plateau, new avenues of electronics design must be explored. Graphene Nanoribbons (GNRs) are a potential solution. Current GNR designs require wasteful exhaustive searches for the required device topologies, limiting the size of the solution space that can be searched. This is fine for simple circuits, but more complex functionality requires a different approach. This work presents a new way of identifying suitable GNR device topologies for any functionality. It also presents an example of this, demonstrating how a circuit using the resultant GNR devices can outperform conventional, more complex circuits.

The proposed methodology uses an evolutionary algorithm to efficiently search a large solution space of possible GNR device topologies. This is done while only having to simulate the behavior of a minuscule fraction of the device topologies in this solution space. The GNR devices found by this evolutionary algorithm are used to implement a 4-bit Analog-to-Digital Converter (ADC), where each bit of the circuit consists of only a couple of GNR devices, in contrast to the many more transistors required for conventional designs.

The resulting ADC circuit performs better than conventional ADC designs in terms of energy cost, conversion delay, and required circuit area by several orders of magnitude.

Electronic interfaces, particularly microelectrode arrays (MEAs), are crucial for studying electrophysiological processes in the body, with applications ranging from implants to deep brain simulators. In neuroscience, they play a vital role in exploring neuronal cell distribution and behaviour, as well as disorders like epilepsy and Alzheimer’s disease. However, electrophysiological recordings have limitations, that have led to the exploration of optical approaches like calcium imaging. To address the shortcomings, a promising strategy involves integrating electrophysiology and optical methods for simultaneous cellular activity measurement, capitalising on their combined temporal and spatial resolution. The challenge lies in developing fully transparent MEAs to overcome the limitations of traditional opaque electrodes.
Graphene’s versatile properties, spanning from electrical conductivity to mechanical flexibility, position it as an ideal material for transparent and flexible electronics, particularly in neural recording and stimulation. Due to these properties, graphene MEAs (gMEAs) allow integration with various optical techniques, overcoming limitations associated with traditional opaque MEAs.
In this project, we designed and fabricated a transparent gMEA, intended to perform electrical signal recordings and optical voltage mappings simultaneously from photostimulated optogenetic cell lines. The design allows for photostimulation from a source beneath the gMEA, while enabling unobstructed optical measurements from above. The electrodes were crafted from multilayer chemical vapour deposition (CVD) graphene, chosen for its transparency and favourable electrical properties. Quartz and sapphire were evaluated as potential substrates for the device. After demonstrating the synthesis of multilayer graphene was possible on both substrates, quartz was selected as the preferred material due to its resistance to graphene delamination.
Characterisation of the gMEAs was done using various techniques, including optical transmittance (OT), electrochemical impedance spectroscopy (EIS), and measurements of the signal-to-noise ratio (SNR). The stability of the gMEAs was also assessed by immersing the devices in cell culture medium and with ageing tests performed in PBS. Initial electrochemical characterisation of the gMEAs exhibited promising signal detection despite a relatively high baseline noise of ∼ 23 μV . In comparison, commercially available MultiChannel Systems MEA (60MEA200/30iR-Ti), showed a lower baseline noise (∼ 4 μV ), but gMEAs achieved comparable signal sensitivity. EIS of gMEAs revealed an impedance at 1 kHz ranging from 3.2 to 9.89 MΩ, largely surpassing values in other studies. However, when area normalised, the impedance remained comparable to reported values. Stability tests identified issues related to the permeability of the encapsulation layer and degradation of molybdenum structures, causing large variations in the SNR and EIS measurements after exposure to liquid media.

Resolving the underlying mechanisms of complex brain functions and associated disorders remains a major challenge in neuroscience, largely due to the difficulty in mapping large-scale neural network dynamics with high temporal and spatial resolution. Multimodal neural platforms that integrate optical and electrical modalities offer a promising solution, with microelectrode arrays (MEAs) being particularly effective for capturing electrophysiological activity across multiple neurons at the cellular level. Graphene has emerged as a highly attractive material for such neural interfaces due to its unique combination of biophysical, electrical, mechanical, biological, and optical properties. However, current graphene-based electrodes face challenges, including the need for transferring pre-grown graphene layers, which causes reliability issues.

In this work, microelectrode arrays based on transfer-free multilayer graphene and PEDOT:PSS are developed, and their feasibility for in vitro neural activity detection is evaluated through a brain slice culture. Firstly, the design and fabrication of graphene-based MEAs (grMEA) on transparent substrates is presented, establishing optimized microfabrication procedures for the integration of transfer-free multilayer graphene technology on in vitro MEAs. Several electrode diameters, ranging from 10 μm to 500 μm, are included to accommodate different experimental requirements and test the limits of the technology. Second, the combination of graphene and PEDOT:PSS conductive polymer is explored to overcome the fundamental limitations associated with graphene electrodes, such as high impedance at small electrode sizes, without compromising the optical transparency. A technique to integrate patterned PEDOT:PSS polymer coating on the electrodes to form graphene/PEDOT:PSS microelectrodes
(grppMEA) is developed.

The electrochemical performance, including charge storage capacity (CSC) and impedance properties, of the grMEA and grppMEA devices are evaluated. Obtained results, comparable with state-of-the-art neural interfaces, show that the PEDOT:PSS coating increases CSC values more than the double and substantially reduces the impedance by 10-20 times (e.g., from 247 kΩ to 13 kΩ for 50 μm diameter electrodes). This demonstrates the potential of the devices for efficient electrical coupling with neural tissue. Additionally, the volumetric capacitance of grppMEA electrodes was found to be 55.7 F/cm3, highlighting the volumetric ionic-electronic interaction coming from the PEDOT:PSS film, a feature absent in metal electrodes.

A custom-made interface that effectively connects the MEA devices to specific recording systems is developed to enable the acquisition of neural signals. The electrophysiological recording capabilities of the grMEA and grppMEA devices were subsequently evaluated through in vitro cerebellar brain slice cultures. Acute recordings of spontaneous activity and spike pattern characteristics of Purkinje cells and other neurons have been successfully obtained. The obtained signal-to-noise ratio values, ∼ 30 dB, demonstrate the great recording potential of the proposed MEAs. Overall, the results presented in this work demonstrate that transfer-free multilayer graphene MEA technology, especially when combined with PEDOT:PSS, overcomes the current limitations and offers the possibility for high-density recordings with single-cell resolution.