This article presents a 4096-element ultrasound probe for high volume-rate (HVR) cardiovascular imaging. The probe consists of two application-specific integrated circuits (ASICs), each of which interfaces with a 2048-element monolithically-integrated capacitive micro-machined ultrasound transducer (CMUT) array. The probe can image a 60° × 60° × 10-cm volume at 2000 volumes/s, the highest volume-rate with in-probe channel-count reduction reported to date. It uses 2 × 2 delay-and-sum micro-beamforming (μBF) and 2× time-division multiplexing (TDM) to achieve an 8× receive (RX) channel-count reduction. Equalization, trained using a pseudorandom bit-sequence generated on the chip, reduces TDM-induced crosstalk by 10 dB, enabling power-efficient scaling of the cable drivers. The ASICs also implement a novel transmit (TX) beamformer (BF) that operates as a programmable digital pipeline, which enables steering of arbitrary pulse-density modulated (PDM) waveforms. The TX BF drives element-level 65 V unipolar pulsers, which in turn drive the CMUT array. Both the TX BF and RX μBF are programmed with shift-registers (SRs) that can either be programmed in a row-column fashion for fast upload times, or daisy-chain fashion for a higher flexibility. The layout of the ASICs is matched to the 365-μm-pitch monolithically-integrated CMUT array. While operating, the RX and logic power consumption per element is 0.85 and 0.10 mW, respectively. TX power consumption is highly waveform dependent, but is nominally 0.34 mW. Compared to the prior art, the probe has the highest volume rate, and features among the largest imaging arrays (both in terms of element-count and aperture) with a high flexibility in defining the TX waveform. These properties make it a suitable option for applications requiring HVR imaging of a large region of interest.

IN [1], there is a mistake in the timing diagram shown in Fig. 6. Switches S 1-S 4 are skipping some of the samples and the rate at which they are operating implies a TDM rate of 10 MHz, whereas (as described in [1]) this should be 20 MHz. In the updated Fig. 6, S 1-S 4 have been updated and a minor change has been made to the timing shown for switches Q₁ and Q₂, such that the correct TDM rate is indicated and no sample provided to the S/H stage via N1-N4 is skipped in the diagram. (Figure presented).

This work describes an ASIC design for high-frame-rate 3D intracardiac echocardiography probes. The chip is the first to combine element-level high-voltage pulsers and time-gain-compensation analog frontends as well as subarray beamformers and in-probe digitization in a pitch-matched fashion. The integration challenge is met by a shared hybrid beamforming ADC with the highest reported area and power efficiency. The achieved beamformer size of three elements enables acquisition at 1000 volumes/s while, in combination with a custom datalink, still providing sufficient channel-count reduction for catheter integration.

Intra-cardiac echography (ICE) probes (Fig. 32.2.1) are widely used in electrophysiology for their good procedure guidance and relatively safe application. ASICs are increasingly employed in these miniature probes to enhance signal quality and reduce the number of connections needed in mm-diameter catheters [1]-[5]. 3D visualization in real-time is additionally enabled by 2D transducer arrays with, for each transducer element, a high-voltage (HV) transmit (TX) part, to generate acoustic pulses of sufficient pressure, and a receive (RX) path, to process the resulting echoes. To achieve the required reduction in RX channels, micro-beamforming (BF), which merges the signals from a subarray using a delay-and-sum operation, has been shown to be an effective solution [3], [4]. However, due to the frame-rate reduction that is associated with BF, these designs cannot serve emerging high-frame-rate imaging modes (1000 volumes/s) like 3D blood-flow and elastography imaging. In-probe digitization has recently been investigated to provide further channel-count reduction, make data transmission more robust, and enable pre-processing in the probe [1]-[3]. However, these earlier designs have either no TX functionality [2], [3] or only low-voltage (LV) TX [1] integrated. Combining BF and digitization with area-hungry HV transmitters in a pitch-matched scalable fashion while supporting high-frame-rate imaging remains an unmet challenge. The work presented in this paper meets this target, enabled by a hybrid ADC, the small die size of which allows for co-integration with 65V element-level pulsers.

Information literacy has gradually become one of the necessary qualities in current and future safety practices. The calculation and assessment of information literacy of safety professionals is an effective way to understand their information literacy level. This paper, therefore, aims to evaluate the information literacy level of safety management personnel, for improving their ability to comprehend safety language/technology/information. Based on the theory of safety information systems and the characteristics of safety professionals, this study develops an index system to assess the information literacy level of safety professionals. The index system consists of five indexes: safety information demand consciousness, safety information acquisition ability, safety information evaluation ability, safety information utilization ability, and information ethics. According to the analytic hierarchy process method, the weight of the index can be determined. This developed method was implemented to evaluate the safety information literacy level of 40 safety professionals from four different corporations. The quantitative results of the fuzzy evaluation are in good agreement with the qualitative analysis results, indicating that the index system has excellent applicability and can be applied to the evaluation of the information literacy level of safety professionals. Besides, recommendations are put forward to improve the information literacy of safety professionals.

As medical ultrasound imaging moves from conventional cart-based scanners to new form factors such as imaging catheters, hand-held point-of-care scanners and ultrasound patches, there is an increasing need for integrated transceivers that can be closely integrated with the transducer to provide channel-count reduction, improved signal quality and even full digitization. This paper reviews compact and power-efficient circuit solutions for such transceivers. It starts with a brief overview of ultrasound transducer technologies and the operating principles of the ultrasound transmit-receive signal path. For transmission, high-voltage pulsers are reviewed, from compact unipolar pulsers to multi-level pulsers that provide amplitude control and improved power efficiency. The review of receive circuits starts with low-noise amplifiers as the power- and performance-limiting building block. Solutions for time-gain compensation are discussed, which are essential to reduce signal dynamic range by compensating for the decaying echo-signal amplitude associated with propagation attenuation. Finally, the option of direct digitization of the echo signal at the transducer is discussed. The paper ends with a reflection on future opportunities and challenges in the area of integrated circuits for ultrasound applications.

This paper presents an ultrasound receiver ASIC in 180nm CMOS that enables element-level digitization of echo signals in miniature 3D ultrasound probes. It is the first to integrate an analog front-end and a 10-b Nyquist ADC within the 150 μ m element pitch of a 5-MHz 2D transducer array. To achieve this, a hybrid SAR/shared-single-slope architecture is proposed in which the ramp generator is shared within each 2 × 2 subarray. The ASIC consumes 1.54mW/element and has been successfully demonstrated in an acoustic imaging experiment.

This thesis describes the analysis, design and evaluation of front-end application-specific integrated circuits (ASICs) for 3-D medical ultrasound imaging, with the focus on the receive electronics. They are specifically designed for next-generation miniature 3-D ultrasound devices, such as transesophageal echocardiography (TEE), intracardiac echocardiography (ICE) and intravascular ultrasound (IVUS) probes. These probes, equipped with 2-D array transducers and thus the capability of volumetric visualization, are crucial for both accurate diagnosis and therapy guidance of cardiovascular diseases. However, their stringent size constraints, as well as the limited power budget, increase the difficulty in integrating in-probe electronics. The mismatch between the increasing number of transducer elements and the limited cable count that can be accommodated, also makes it challenging to acquire data from these probes. Front-end ASICs that are optimized in both system architecture and circuit-level implementation are proposed in this thesis to tackle these problems.
The techniques described in this thesis have been applied in several prototype realizations, including one LNA test chip, one PVDF readout IC, two analog beamforming ASICs and one ASIC with on-chip digitization and datalinks. All prototypes have been evaluated both electrically and acoustically. The LNA test chip achieved a noise-efficiency factor (NEF) that is 2.5 × better than the state-of-the-art. One of the analog beamforming ASIC achieved a 0.27 mW/element power efficiency with a compact layout matched to a 150 µm element pitch. This is the highest power-efficiency and smallest pitch to date, in comparison with state-of-the-art ultrasound front-end ASICs. The ASIC with integrated beamforming ADC consumed only 0.91 mW/element within the same element area. A comparison with previous digitization solutions for 3-D ultrasound shows that this work achieved a 10 × improvement in power-efficiency, as well as a 3.3 × improvement in integration density.

This paper presents a power- and area-efficient approach to digitizing the echo signals received by piezoelectric transducer elements, commonly used for ultrasound imaging. This technique utilizes such elements not only as sensors but also as the loop filter of an element-level δσ analog to digital converter (ADC). The receiver chain is thus greatly simplified, yielding savings in area and power. Every ADC becomes small enough to fit underneath a 150 μm × 150 μm transducer element, enabling simultaneous acquisition and digitization from all the elements in a 2-D array. This is especially valuable for miniature 3-D probes. Experimental results are reported for a prototype receiver chip with an array of 5×4 element-matched ADCs and a transducer array fabricated on top of the chip. Each ADC consumes 800 μW from a 1.8 V supply and achieves a SNR of 47 dB in a 75% bandwidth around a center frequency of 5 MHz.

Data acquisition from 2D transducer arrays is one of the main challenges for the development of emerging miniature 3D ultrasound imaging devices, such as 3D trans-esophageal (TEE) and intra-cardiac echocardiography (ICE) probes (Fig. 10.5.1). The main obstacle lies in the mismatch between the large number of transducer elements (103 to 104) and the limited cable count (<;200). Recent advances in transducer-on-CMOS integration have enabled the use of in-probe subarray beamforming based on delay-and-sum (DAS) circuits [1] to reduce the channel count by an order of magnitude. Further reduction calls for in-probe digitization to enable more advanced data processing and compression in the digital domain. However, prior designs [2-4] compromise on transducer pitch (> half wavelength) to accommodate the ADC and consume >9mW/element, which translates into unacceptable self-heating in miniature 3D probes.

Intravascular ultrasound is an imaging modality used to visualize atherosclerosis from within the inner lumen of human arteries. Complex lesions like chronic total occlusions require forward-looking intravascular ultrasound (FL-IVUS), instead of the conventional side-looking geometry. Volumetric imaging can be achieved with 2D array transducers, which present major challenges in reducing cable count and device integration. In this work we present an 80-element lead zirconium titanate (PZT) matrix ultrasound transducer for FL-IVUS imaging with a front-end application-specific integrated circuit (ASIC) requiring only 4 cables. After investigating optimal transducer designs we fabricated the matrix transducer consisting of 16 transmit (TX) and 64 receive (RX) elements arranged on top of an ASIC having an outer diameter of 1.5 mm and a central hole of 0.5 mm for a guidewire. We modeled the transducer using finite element analysis and compared the simulation results to the values obtained through acoustic measurements. The TX elements showed uniform behavior with a center frequency of 14 MHz, a -3 dB bandwidth of 44 &#x0025; and a transmit sensitivity of 0.4 kPa/V at 6 mm. The RX elements showed center frequency and bandwidth similar to the TX elements, with an estimated receive sensitivity of 3.7 &#x03BC;V/Pa. We successfully acquired a 3D FL image of three spherical reflectors in water using delay-and-sum beamforming and the coherence factor method. Full synthetic aperture acquisition can be achieved with frame rates on the order of 100 Hz. The acoustic characterization and the initial imaging results show the potential of the proposed transducer to achieve 3D FL-IVUS imaging.

Until now, no matrix transducer has been realized for 3D transesophageal echocardiography (TEE) in pediatric patients. In 3D TEE with a matrix transducer, the biggest challenges are to connect a large number of elements to a standard ultrasound system, and to achieve a high volume rate (>200 Hz). To address these issues, we have recently developed a prototype miniaturized matrix transducer for pediatric patients with micro-beamforming and a small central transmitter. In this paper we propose two multiline parallel 3D beamforming techniques (μBF25 and μBF169) using the micro-beamformed datasets from 25 and 169 transmit events to achieve volume rates of 300 Hz and 44 Hz, respectively. Both the realizations use angle-weighted combination of the neighboring overlapping sub-volumes to avoid artifacts due to sharp intensity changes introduced by parallel beamforming. In simulation, the image quality in terms of the width of the point spread function (PSF), lateral shift invariance and mean clutter level for volumes produced by μBF25 and μBF169 are similar to the idealized beamforming using a conventional single-line acquisition with a fully-sampled matrix transducer (FS4k, 4225 transmit events). For completeness, we also investigated a 9 transmit-scheme (3 × 3) that allows even higher frame rates but found worse B-mode image quality with our probe. The simulations were experimentally verified by acquiring the μBF datasets from the prototype using a Verasonics V1 research ultrasound system. For both μBF169 and μBF25, the experimental PSFs were similar to the simulated PSFs, but in the experimental PSFs, the clutter level was ∼10 dB higher. Results indicate that the proposed multiline 3D beamforming techniques with the prototype matrix transducer are promising candidates for real-time pediatric 3D TEE.

This paper presents a front-end application-specified integrated circuit (ASIC) integrated with a 2-D PZT matrix transducer that enables in-probe digitization with acceptable power dissipation for the next-generation endoscopic and catheter-based 3-D ultrasound imaging systems. To achieve power-efficient massively parallel analog-to-digital conversion (ADC) in a 2-D array, a 10-bit 30 MS/s beamforming ADC that merges the subarray beamforming and digitization functions in the charge domain is proposed. It eliminates the need for costly intermediate buffers, thus significantly reducing both power consumption and silicon area. Self-calibrated charge references are implemented in each subarray to further optimize the system-level power efficiency. High-speed datalinks are employed in combination with the subarray beamforming scheme to realize a 36-fold channel-count reduction and an aggregate output data rate of 6 Gb/s for a prototype receive array of 24 x 6 elements. The ASIC achieves a record power efficiency of 0.91 mW/element during receive. Its functionality has been demonstrated in both electrical and acoustic imaging experiments.

This paper presents an area- and power-efficient application-specified integrated circuit (ASIC) for 3-D forward-looking intravascular ultrasound imaging. The ASIC is intended to be mounted at the tip of a catheter, and has a circular active area with a diameter of 1.5 mm on the top of which a 2-D array of piezoelectric transducer elements is integrated. It requires only four micro-coaxial cables to interface 64 receive (RX) elements and 16 transmit (TX) elements with an imaging system. To do so, it routes high-voltage (HV) pulses generated by the system to selected TX elements using compact HV switch circuits, digitizes the resulting echo signal received by a selected RX element locally, and employs an energy-efficient load-modulation datalink to return the digitized echo signal to the system in a robust manner. A multi-functional command line provides the required sampling clock, configuration data, and supply voltage for the HV switches. The ASIC has been realized in a 0.18-&#x03BC;m HV CMOS technology and consumes only 9.1 mW. Electrical measurements show 28-V HV switching and RX digitization with a 16-MHz bandwidth and 53-dB dynamic range. Acoustical measurements demonstrate successful pulse transmission and reception. Finally, a 3-D ultrasound image of a three-needle phantom is generated to demonstrate the imaging capability.

This paper presents the design, fabrication and characterization of a miniature PZT-on-CMOS matrix transducer for real-time pediatric 3-dimensional (3D) transesophageal echocardiography (TEE). This 3D TEE probe consists of a 32 × 32 array of PZT elements integrated on top of an Application Specific Integrated Circuit (ASIC). We propose a partitioned transmit/receive array architecture wherein the 8 × 8 transmitter elements, located at the centre of the array, are directly wired out and the remaining receive elements are grouped into 96 sub-arrays of 3 × 3 elements. The echoes received by these sub-groups are locally processed by micro-beamformer circuits in the ASIC that allow pre-steering up to ±37°. The PZT-on-CMOS matrix transducer has been characterized acoustically and has a centre frequency of 5.8 MHz, -6 dB bandwidth of 67%, a transmit efficiency of 6 kPa/V at 30 mm, and a receive dynamic range of 85 dB with minimum and maximum detectable pressures of 5 Pa and 84 kPa respectively. The properties are very suitable for a miniature pediatric real-time 3D TEE probe.

This paper presents a power-and area-efficient front-end application-specific integrated circuit (ASIC) that is directly integrated with an array of 32 × 32 piezoelectric transducer elements to enable next-generation miniature ultrasound probes for real-time 3-D transesophageal echocardiography. The 6.1 × 6.1 mm² ASIC, implemented in a low-voltage 0.18-μm CMOS process, effectively reduces the number of receive (RX) cables required in the probe's narrow shaft by ninefold with the aid of 96 delay-and-sum beamformers, each of which locally combines the signals received by a sub-array of 3 × 3 elements. These beamformers are based on pipeline-operated analog sample-and-hold stages and employ a mismatch-scrambling technique to prevent the ripple signal associated with the mismatch between these stages from limiting the dynamic range. In addition, an ultralow-power low-noise amplifier architecture is proposed to increase the power efficiency of the RX circuitry. The ASIC has a compact element matched layout and consumes only 0.27 mW/channel while receiving, which is lower than the state-of-the-art circuit. Its functionality has been successfully demonstrated in 3-D imaging experiments.

Data acquisition from 2-D transducer arrays has become one of the main challenges for the development of endoscopic and catheter-based 3-D ultrasound imaging devices. Front-end ASICs with sub-array pre-beamforming have been reported that reduce the cable number by an order of magnitude. Further channel reduction requires digitization in the front-end ASIC to facilitate more in-probe data processing functions. Prior solutions, however, are too large and power-hungry to be integrated in a miniature ultrasound probe. In this work, we present a front-end ASIC with an element-pitch-matched layout that combines sub-array beamforming, digitization and high-speed data transmission. It achieves a 36-fold channel-count reduction and a record power-efficiency with less than 1 mW/element power dissipation in receive.

Echocardiography is a portable, safe, and low-cost imaging technique for accurate assessment of the heart. In transesophageal echocardiography (TEE) the esophagus is utilized as the imaging window to examine the cardiac anatomy and function. In conventional TEE probes, a one-dimensional (1D) ultrasound array is employed to obtain two-dimensional (2D) cross-sectional images of the heart. Since cardiac morphology, leakage of valves and function of the outflow tracts are all three-dimensional (3D) phenomena, it is beneficial to interpret them from 3D images. Therefore, there is high clinical demand for matrix TEE probes that are capable of providing real-time volumetric images [1]. Several matrix arrays (Philips X7-2t, Siemens V5M TEE, General Electric 6VTD) have been developed for this purpose, however all of them are large in size (~10 cm3) and uncomfortable to use on non-anesthetized patients [2]. We aim to develop a matrix TEE probe with a small head volume (<1 cm3), which is suitable for long term monitoring of cardiac system on adults and in babies. We have developed a prototype of a small matrix TEE probe, which consists of a piezoelectric matrix transducer directly mounted on an Application Specific Integrated Circuit (ASIC). The ASIC performs the task of micro-beamforming, signal amplification and efficient data reduction. The piezoelectric matrix array consist of a 32×32 PZT elements with a pitch of 150 μm × 150 μm. The transmit aperture consists of 8×8 elements at the centre of the array, which are directly wired out to the ultrasound system. The remaining 864 elements are used in receive and are organized in 96 sub-arrays of 3×3 elements to reduce the cable count with a factor of 9. The signals from the individual elements in a sub-array are combined to a single output signal using a micro-beamformer on the ASIC. The micro-beamformer allows pre-steering of 0◦, ±17◦, and ±37◦ angles in both lateral and elevation directions. By recording datasets for different pre-steering angles, and by processing and combining them, a large volume image can be constructed. Acoustic performance of the prototype is evaluated in a water tank. The transmit transfer function of a single element is measured by applying a 20 cycle sinusoidal voltage, sweeping from 3 to 8 MHz with steps of 50 kHz. The output pressure is recorded by a calibrated hydrophone. It is found that the transducer has a central frequency of 5 MHz, a bandwidth of 40% and a transmit efficiency of 6.4 kPa/V (at 51 mm). To characterize the micro-beamforming function, three delay angles of 0◦, 17◦ and 37◦ were programmed. While transmitting with a well-defined external source, the output voltage from a sub-group was recorded from -50◦ to +50◦ degrees. We observe that the theoretical values of the beam profile agree well with the measurement results, especially with regard to the position of the grating lobes and side lobes.

Forward-looking intravascular ultrasound (FL-IVUS) transducers are needed to image complex lesions in the coronary arteries, such as chronic total occlusions (CTOs). To achieve 2D and 3D FL-IVUS imaging, transducer arrays can be integrated at the tip of the catheter. However, connecting the elements is challenging due to the limited space available. In this work, we present a FL-IVUS matrix transducer consisting of 16 transmit and 64 receive elements, which are interfaced with an ASIC that requires only 4 micro-coaxial cables. The transducer performance was characterized by hydrophone measurements and FL imaging of three spherical reflectors

This work presents a compact ADC architecture capable of digitizing the signals received by every individual element of a 2D ultrasound transducer array. An element-matched layout of 150 μm × 150 μm is realized by exploiting each piezo-electric transducer element not only as the signal source, but also as the electro-mechanical loop-filter of a continuoustime band-pass ΔΣ ADC, thus minimizing the required circuit blocks. The transducer's frequency response, which is inherently matched with the signal bandwidth of interest, provides noise shaping to the ADC. A prototype chip has been fabricated in a 0.18 μm CMOS technology, featuring 20 ADCs located directly underneath a 150 μm-pitch piezo-electric transducer array fabricated on top of the chip. Each ADC, clocked at 200 MHz, consumes 800 μψ from a 1.8 V supply, and achieves an SNR of 47 dB in a 75% bandwidth around a center frequency of 5 MHz. Acoustic measurements show that the ADC successfully digitizes incoming echo signals.