C.J.M. Verhoeven
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48 records found
1
Adaptation of an Impedance/Capacitance Measurement Setup for Commercial and Laboratory-Scale Solar Cells
Rethinking Measurements for Next-Generation Solar Cells
In addition to the electrical measurement setup, the illumination system was characterized using spectral irradiance measurements at different LED heights. A height of 20 cm was selected as the preferred reference height when illumination uniformity over the full commercial-scale cell area is most important. A lower height of 10 cm was used for representative electrical validation measurements, because the increased irradiance produced clearer capacitance and impedance results.
To make the setup suitable for repeated use, software was developed as a control and processing layer between the user and the measurement instruments. The software provides a GUI, automates DC and AC measurement routines, processes measured data, calculates power, impedance, admittance and capacitance, and stores the results in CSV files. Reliability features such as retry logic, safety limits, repeated readings, median filtering and rejection of unstable AC measurement points were included to improve consistency.
The adapted setup was successfully used to measure both lab-scale and commercial-scale solar cells over a frequency range of approximately 5 Hz to 10 kHz and within the required DC bias voltage range. The obtained capacitance and impedance curves showed stable and physically meaningful behaviour, comparable to trends reported in the literature. Although limitations remain, the final system provides a functional and user-friendly basis for future solar-cell characterization and research into dynamic photovoltaic behaviour and photovoltatronics applications. ...
In addition to the electrical measurement setup, the illumination system was characterized using spectral irradiance measurements at different LED heights. A height of 20 cm was selected as the preferred reference height when illumination uniformity over the full commercial-scale cell area is most important. A lower height of 10 cm was used for representative electrical validation measurements, because the increased irradiance produced clearer capacitance and impedance results.
To make the setup suitable for repeated use, software was developed as a control and processing layer between the user and the measurement instruments. The software provides a GUI, automates DC and AC measurement routines, processes measured data, calculates power, impedance, admittance and capacitance, and stores the results in CSV files. Reliability features such as retry logic, safety limits, repeated readings, median filtering and rejection of unstable AC measurement points were included to improve consistency.
The adapted setup was successfully used to measure both lab-scale and commercial-scale solar cells over a frequency range of approximately 5 Hz to 10 kHz and within the required DC bias voltage range. The obtained capacitance and impedance curves showed stable and physically meaningful behaviour, comparable to trends reported in the literature. Although limitations remain, the final system provides a functional and user-friendly basis for future solar-cell characterization and research into dynamic photovoltaic behaviour and photovoltatronics applications.
Creating an Educational Interactive Sound Sculpture
Hardware, Sensing and Visualization
Creating an Educational Integrated Sound Sculpture
Digital Signal Processing and Wave Generation
This thesis investigates the fundamental causes and characterization of stimulation artifacts in the context of visual prostheses through the lens of an electrode-tissue interface (ETI) model. A comprehensive review of existing artifact reduction techniques is provided, assessing their efficacy and trade-offs regarding implementation complexity and signal integrity. The review serves as a framework for the introduction of two novel artifact reduction techniques that target the residual artifact to permit recording of post-stimulation action potentials (APs).
A residual artifact reduction technique is proposed that replicates and cancels the artifact at the input of the recording analog front-end (AFE). Replication of the artifact is performed through the voltage decay of an RC network with a characteristic time constant equal to the ETI model. Although the concept of this technique is completely novel, the system implementation is impractical due to technological limitations.
A rapid charge reset technique for fast settling of artifact transients is also proposed and implemented with an AFE designed in the TSMC 40 nm CMOS technology node. The system features an AC-coupled low-noise boxcar sampler (LNBS) followed by a switched-capacitor low-pass filter (SC-LPF). The maximum artifact considered for the application of this work can be reduced from 725 mVpp to 2.1 mVpp—a reduction of approximately 50.8 dB—within a recovery time of 50 μs while maintaining a low power consumption of approximately 205 nW per channel and an input-referred integrated noise performance of 7.6 μVrms over the system bandwidth of 300 Hz - 5 kHz. Further reduction of the residual artifact requires minimization of the residual charge across the ETI that is present post-stimulation. ...
This thesis investigates the fundamental causes and characterization of stimulation artifacts in the context of visual prostheses through the lens of an electrode-tissue interface (ETI) model. A comprehensive review of existing artifact reduction techniques is provided, assessing their efficacy and trade-offs regarding implementation complexity and signal integrity. The review serves as a framework for the introduction of two novel artifact reduction techniques that target the residual artifact to permit recording of post-stimulation action potentials (APs).
A residual artifact reduction technique is proposed that replicates and cancels the artifact at the input of the recording analog front-end (AFE). Replication of the artifact is performed through the voltage decay of an RC network with a characteristic time constant equal to the ETI model. Although the concept of this technique is completely novel, the system implementation is impractical due to technological limitations.
A rapid charge reset technique for fast settling of artifact transients is also proposed and implemented with an AFE designed in the TSMC 40 nm CMOS technology node. The system features an AC-coupled low-noise boxcar sampler (LNBS) followed by a switched-capacitor low-pass filter (SC-LPF). The maximum artifact considered for the application of this work can be reduced from 725 mVpp to 2.1 mVpp—a reduction of approximately 50.8 dB—within a recovery time of 50 μs while maintaining a low power consumption of approximately 205 nW per channel and an input-referred integrated noise performance of 7.6 μVrms over the system bandwidth of 300 Hz - 5 kHz. Further reduction of the residual artifact requires minimization of the residual charge across the ETI that is present post-stimulation.
Designing CIM systems requires multi-level simulation approaches because device or circuit-level design choices can significantly impact system-level efficiency and accuracy. Simulations for CIM architectures span a broad spectrum, from high-level analytical models that provide quick but coarse estimates to detailed circuit-level simulations that provide accuracy at the cost of scalability. However, this leaves a gap in evaluating CIM architectures at realistic workload scales while maintaining sufficient fidelity. This work targets the intermediate cycle- and system-level domain to address this, aiming to bridge the gap between abstract analytical evaluations and low-level hardware description implementations.
This work develops an event-based CIM architecture simulation framework showcased by the simulation of an accelerator system defined with a target multiply and accumulate (MAC) block architecture. Workloads, including basic MLP, CNN, and NLP models, were executed to analyse metrics such as cycle delay, tile count and utilisation as an efficiency indicator. The impact of tunable simulation parameters was also evaluated considering four defined MAC block topologies. Simulation results show for an MLP workload an increase of 7.6% tile utilisation between two topologies, while reporting on both the number of execution cycles and necessary hardware.
Overall, the CIM architecture simulation platform can effectively serve as a tool for mid-stage design exploration and performance evaluation of CIM-based accelerators. The framework’s modular, eventbased structure enables architectural exploration while providing realistic timing behaviour, distinguishing it from analytical and device-level tools. ...
Designing CIM systems requires multi-level simulation approaches because device or circuit-level design choices can significantly impact system-level efficiency and accuracy. Simulations for CIM architectures span a broad spectrum, from high-level analytical models that provide quick but coarse estimates to detailed circuit-level simulations that provide accuracy at the cost of scalability. However, this leaves a gap in evaluating CIM architectures at realistic workload scales while maintaining sufficient fidelity. This work targets the intermediate cycle- and system-level domain to address this, aiming to bridge the gap between abstract analytical evaluations and low-level hardware description implementations.
This work develops an event-based CIM architecture simulation framework showcased by the simulation of an accelerator system defined with a target multiply and accumulate (MAC) block architecture. Workloads, including basic MLP, CNN, and NLP models, were executed to analyse metrics such as cycle delay, tile count and utilisation as an efficiency indicator. The impact of tunable simulation parameters was also evaluated considering four defined MAC block topologies. Simulation results show for an MLP workload an increase of 7.6% tile utilisation between two topologies, while reporting on both the number of execution cycles and necessary hardware.
Overall, the CIM architecture simulation platform can effectively serve as a tool for mid-stage design exploration and performance evaluation of CIM-based accelerators. The framework’s modular, eventbased structure enables architectural exploration while providing realistic timing behaviour, distinguishing it from analytical and device-level tools.
The subsystem presented in this report is tasked with programming the FRDM-MCXN947 development board to enable and improve communication and control between the PCS array and the microcontroller unit (MCU). In addition, the development board is also explored to investigate the feasibility of replacing currently used external modules with on-board peripherals. To achieve this, the CTIMER and SCTIMER are analyzed and implemented with the MCUXpresso IDE. The results showed that both of these peripherals have difficulties in simultaneously generating clock signals of different frequencies required for the communication protocol between the sensor and the MCU. However, the SCTIMER is capable of generating a differential clock, currently produced by the AD9552 external clock, though with lower signal quality. ...
The subsystem presented in this report is tasked with programming the FRDM-MCXN947 development board to enable and improve communication and control between the PCS array and the microcontroller unit (MCU). In addition, the development board is also explored to investigate the feasibility of replacing currently used external modules with on-board peripherals. To achieve this, the CTIMER and SCTIMER are analyzed and implemented with the MCUXpresso IDE. The results showed that both of these peripherals have difficulties in simultaneously generating clock signals of different frequencies required for the communication protocol between the sensor and the MCU. However, the SCTIMER is capable of generating a differential clock, currently produced by the AD9552 external clock, though with lower signal quality.
A socket was developed to ensure good electrical contact using an anisotropic conductive sheet, allowing the QFN-packaged PCS chip to be inserted and removed without the need for soldering. The socket interfaces with a tightly sealed chamber to prevent gas leakage (< 0.1 ml/min) and maintain a stable gas flow across the sensor. Both components were prototyped in Polyethylene Terephthalate Glycol (PETG) and therefore do not fulfill the final requirement for heat and chemical resistance yet.
To automate gas delivery, the system integrates Bronkhorst mass flow controllers and RVM industrial microfluidic rotary valves. A Python-based graphical user interface (GUI) was developed to schedule gas flow profiles, control valve positions and compute VOC concentrations using the Antoine equation and Dalton's Law of Partial Pressures. This enables dynamic delivery of programmable VOC concentration. Although the automated control system meets most mandatory requirements and all trade-off requirements, some limitations remain. These include unreliable serial communication with the valve during automated operation, even though manual operation through the GUI is executed reliably. This inconsistency is likely caused by timing or firmware-related issues. ...
A socket was developed to ensure good electrical contact using an anisotropic conductive sheet, allowing the QFN-packaged PCS chip to be inserted and removed without the need for soldering. The socket interfaces with a tightly sealed chamber to prevent gas leakage (< 0.1 ml/min) and maintain a stable gas flow across the sensor. Both components were prototyped in Polyethylene Terephthalate Glycol (PETG) and therefore do not fulfill the final requirement for heat and chemical resistance yet.
To automate gas delivery, the system integrates Bronkhorst mass flow controllers and RVM industrial microfluidic rotary valves. A Python-based graphical user interface (GUI) was developed to schedule gas flow profiles, control valve positions and compute VOC concentrations using the Antoine equation and Dalton's Law of Partial Pressures. This enables dynamic delivery of programmable VOC concentration. Although the automated control system meets most mandatory requirements and all trade-off requirements, some limitations remain. These include unreliable serial communication with the valve during automated operation, even though manual operation through the GUI is executed reliably. This inconsistency is likely caused by timing or firmware-related issues.
A custom analog front-end was developed, featuring a transimpedance amplifier (TIA) optimized for low input-referred noise and sufficient bandwidth to preserve pixel-level signal integrity. The complete analog signal path supports capacitive measurements with attofarad-level resolution and readout frequencies ranging from 1 to 100 MHz.
The main PCB integrates the readout circuitry with a central microcontroller (MCXN947), DAC-controlled programmable power supplies, and a variety of user interface connectors, all within a compact six-layer mixed-signal stackup. Particular attention was given to minimizing electromagnetic interference (EMI) and power supply noise through careful grounding, power segmentation, and layout strategies. Although the PCB theoretically satisfies most mandatory and trade-off requirements, including spatial and interface constraints, final verification of the noise performance remains pending due to fabrication lead times. ...
A custom analog front-end was developed, featuring a transimpedance amplifier (TIA) optimized for low input-referred noise and sufficient bandwidth to preserve pixel-level signal integrity. The complete analog signal path supports capacitive measurements with attofarad-level resolution and readout frequencies ranging from 1 to 100 MHz.
The main PCB integrates the readout circuitry with a central microcontroller (MCXN947), DAC-controlled programmable power supplies, and a variety of user interface connectors, all within a compact six-layer mixed-signal stackup. Particular attention was given to minimizing electromagnetic interference (EMI) and power supply noise through careful grounding, power segmentation, and layout strategies. Although the PCB theoretically satisfies most mandatory and trade-off requirements, including spatial and interface constraints, final verification of the noise performance remains pending due to fabrication lead times.
Shockwaves and Tydi-Clash
Raising the abstraction level of the Haskell HDL Clash through typed waveforms and complex streaming interfaces
A common tool in hardware design is the waveform viewer. Although Clash could already generate waveform files, these only contained binary representations of the values. Without translating these to Haskell values, they are difficult to interpret. Shockwaves was created to perform this translation. Unlike other typed waveform solutions, Shockwaves performs the translation fully in the Haskell runtime, and stores the results in lookup tables. This gives the programmer full control over the waveform representation of data. There are two methods of generating VCD files from Clash, and Shockwaves was designed to work with both. The system is fully functional for signals traced during direct simulation. The alternative approach of simulating a design after compiling it to a different HDL depends on the Clash compiler adding type annotations. This requires an overhaul of the Clash compiler beyond the scope of the project.
The second system, Tydi-Clash, is a library for the Tydi streaming specification in Clash. Tydi was designed around transferring complex data structures, and allows for multiple related streams carrying typed, multi-dimensional data. The Tydi-Clash library supports Tydi data types, physical streams, and logical stream constructs. To encourage correct usage of the streams, the internal signals are encapsulated in algebraic and abstract data types that prevent defining or accessing undefined values. Additionally, tests are supplied for behavioral restrictions. An example implementation revealed implementations using Tydi-Clash are unfortunately still a bit cumbersome, but this is believed to be solvable by adding a library of utility modules for common situations. ...
A common tool in hardware design is the waveform viewer. Although Clash could already generate waveform files, these only contained binary representations of the values. Without translating these to Haskell values, they are difficult to interpret. Shockwaves was created to perform this translation. Unlike other typed waveform solutions, Shockwaves performs the translation fully in the Haskell runtime, and stores the results in lookup tables. This gives the programmer full control over the waveform representation of data. There are two methods of generating VCD files from Clash, and Shockwaves was designed to work with both. The system is fully functional for signals traced during direct simulation. The alternative approach of simulating a design after compiling it to a different HDL depends on the Clash compiler adding type annotations. This requires an overhaul of the Clash compiler beyond the scope of the project.
The second system, Tydi-Clash, is a library for the Tydi streaming specification in Clash. Tydi was designed around transferring complex data structures, and allows for multiple related streams carrying typed, multi-dimensional data. The Tydi-Clash library supports Tydi data types, physical streams, and logical stream constructs. To encourage correct usage of the streams, the internal signals are encapsulated in algebraic and abstract data types that prevent defining or accessing undefined values. Additionally, tests are supplied for behavioral restrictions. An example implementation revealed implementations using Tydi-Clash are unfortunately still a bit cumbersome, but this is believed to be solvable by adding a library of utility modules for common situations.
We present a lightweight MobileNetV2-based U-Net architecture with dual attention mechanisms, optimized for edge deployment with only 0.31 million parameters. A new dataset MarsTanYard was created via a semi-automated dataset creation pipeline, enabling efficient annotation of Mars-analogue terrain imagery. Our deep learning network was trained on this dataset and integrated with a ROS2 navigation stack through a modular architecture that transforms segmentation masks into 2D occupancy grids that can be used for rover path planning. Our network achieves a 77% intersection-over-union accuracy for rock segmentation, and physical validation on a testing rover in a Mars analogue environment demonstrates a 94% detection rate for large rocks at close-range. An inference time of 4.49ms was achieved on the target rover hardware using model optimization techniques. The system maintains reliable operation across varying lighting conditions with less than 15% performance degradation.
Results show theoretical collision probability of 7.8 × 10^-7 per rock encounter, enabling months of autonomous operation for typical planetary missions. This work provides an end-to-end validation of the deep learning obstacle detection system, establishing a foundation for enhanced rover autonomy in future Mars exploration missions. ...
We present a lightweight MobileNetV2-based U-Net architecture with dual attention mechanisms, optimized for edge deployment with only 0.31 million parameters. A new dataset MarsTanYard was created via a semi-automated dataset creation pipeline, enabling efficient annotation of Mars-analogue terrain imagery. Our deep learning network was trained on this dataset and integrated with a ROS2 navigation stack through a modular architecture that transforms segmentation masks into 2D occupancy grids that can be used for rover path planning. Our network achieves a 77% intersection-over-union accuracy for rock segmentation, and physical validation on a testing rover in a Mars analogue environment demonstrates a 94% detection rate for large rocks at close-range. An inference time of 4.49ms was achieved on the target rover hardware using model optimization techniques. The system maintains reliable operation across varying lighting conditions with less than 15% performance degradation.
Results show theoretical collision probability of 7.8 × 10^-7 per rock encounter, enabling months of autonomous operation for typical planetary missions. This work provides an end-to-end validation of the deep learning obstacle detection system, establishing a foundation for enhanced rover autonomy in future Mars exploration missions.
In this work a distributed affine formation control algorithm is implemented onto a Crazyflie drones from Bitcraze. Ultra-wideband is used for positioning and communication between the drones. The implementation of the affine formation control algorithm is optimised such that it is only executed when new information is available, to prevent onboard microcontroller from bottlenecking. This resulted in the drones flying in formation successfully with an accuracy of approximately 6.80 cm from its expected position.
Additionally, this algorithm is extended to manage cases where unexpected missing drones could comprise the stability of the formation. The implementation uses the CMSIS library that is optimised for matrix operations. This resulted in the drones flying in formation successfully even in the case of an observation loss with an accuracy of approximately 17.69 cm.
This work not only provides empirical data of experiments with an affine formation control algorithm, but also provides a baseline implementation for future research in the field of affine formation control, which can potentially lead to noise analysis or the application affine formation controls under different circumstances. ...
In this work a distributed affine formation control algorithm is implemented onto a Crazyflie drones from Bitcraze. Ultra-wideband is used for positioning and communication between the drones. The implementation of the affine formation control algorithm is optimised such that it is only executed when new information is available, to prevent onboard microcontroller from bottlenecking. This resulted in the drones flying in formation successfully with an accuracy of approximately 6.80 cm from its expected position.
Additionally, this algorithm is extended to manage cases where unexpected missing drones could comprise the stability of the formation. The implementation uses the CMSIS library that is optimised for matrix operations. This resulted in the drones flying in formation successfully even in the case of an observation loss with an accuracy of approximately 17.69 cm.
This work not only provides empirical data of experiments with an affine formation control algorithm, but also provides a baseline implementation for future research in the field of affine formation control, which can potentially lead to noise analysis or the application affine formation controls under different circumstances.
Powering Electronics worn by Group-Housed Rodents: A Control Loop Design for a Rodent’s Headstage
From Exploration of a Potential Power Link to the Implementation of the Control Loop for a Power Converter
The study explores a potential high-level design of a power link, selecting resonant inductive coupling for wireless power transfer (WPT), enabling continuous power supply over larger areas (for instance, 5 by 5 meters). A literature review reveals a research gap in integrating encircling and underneath configurations for sufficient uniform power distribution. A block diagram of the WPT system is provided, outlining the transmitter and headstage receiver components. Subsequently, a hybrid layout is suggested and significant challenges like optimizing driving current and minimizing angular and vertical misalignments are addressed.
Next, a control loop is systematically designed and implemented. Potential loads and a PMU are
selected, followed by the development and verification of an ideal power converter and its derived
and proposed plant model. Control specifications derived from this model suggest the tuning of the
controller parameters using a tailored model-based control system approach. MATLAB simulations
confirm that the control specifications are met. A non-ideal power converter is then integrated with the control loop, including ideal gate drivers, a voltage-controlled oscillator, a bandgap reference, and a PI controller. Simulation results show that the control loop meets the specifications. Despite limitations in robustness, particularly regarding load and input voltage transient response, the study also highlights the need for verification of the power converter model for load capacitors in the pF-nF range, and identifies discrepancies in overshoot behaviour. Future work includes an analysis of the system’s robustness during controller tuning and the incorporation of a transient controller. The combination of the suggested plant model and model-based tuning approach offer an alternative option for the power converter’s control loop design. ...
The study explores a potential high-level design of a power link, selecting resonant inductive coupling for wireless power transfer (WPT), enabling continuous power supply over larger areas (for instance, 5 by 5 meters). A literature review reveals a research gap in integrating encircling and underneath configurations for sufficient uniform power distribution. A block diagram of the WPT system is provided, outlining the transmitter and headstage receiver components. Subsequently, a hybrid layout is suggested and significant challenges like optimizing driving current and minimizing angular and vertical misalignments are addressed.
Next, a control loop is systematically designed and implemented. Potential loads and a PMU are
selected, followed by the development and verification of an ideal power converter and its derived
and proposed plant model. Control specifications derived from this model suggest the tuning of the
controller parameters using a tailored model-based control system approach. MATLAB simulations
confirm that the control specifications are met. A non-ideal power converter is then integrated with the control loop, including ideal gate drivers, a voltage-controlled oscillator, a bandgap reference, and a PI controller. Simulation results show that the control loop meets the specifications. Despite limitations in robustness, particularly regarding load and input voltage transient response, the study also highlights the need for verification of the power converter model for load capacitors in the pF-nF range, and identifies discrepancies in overshoot behaviour. Future work includes an analysis of the system’s robustness during controller tuning and the incorporation of a transient controller. The combination of the suggested plant model and model-based tuning approach offer an alternative option for the power converter’s control loop design.
There are two most widely used and researched localization techniques to determine the location of the asset. First, a model based(MB) method (e.g. Trilateration algorithm) which uses a mathematical model based on distance and second is a data-driven(DD) method (e.g. Fingerprinting algorithm) that relies on existing data, like RSSI to directly get the location. Algorithms are tested on real data collected by the Crownstones at the Almende office(test environment) divided into a finite number of locations or rooms. Metrics are defined based on the requirements of Almende to compare the MB algorithms with the DD algorithms. In this thesis, firstly, a centralized multilateration(MB-C) algorithm is implemented taking into account distances from N Crownstones at the office. Since one of the requirements was to perform in-network localization, a simple averaging consensus based distributed(MB-D) algorithm was selected and compared against the MB-C algorithm. Results show that the MB-D algorithm is faster, scalable and robust against single-point of failure than the MB-C but is less accurate and does not converge to the centralized solution for a noise variance greater than 10dB.
The MB algorithms have limitations in terms of selecting a model, learning the
model parameters and an additional step of mapping the position output of the implemented MB algorithms to a location is also required. To deal with these challenges, a Machine-learning(ML) based data-driven algorithm is proposed. In this, training datasets were iteratively improved with different features. Then, an Ensemble based centralized ML algorithm (DD-C) is implemented, giving a classification accuracy of 65%. Algorithm is further improved by distributed data handling leading to a classification accuracy of 77%. There has been very little to no study on finding the room-level location of an asset in an indoor setting using a distributed ML based data-driven algorithm. A consensus based distributed ML algorithm (DD-D) is proposed that performs local predictions within the Crownstone network using the same globally trained model giving a classification accuracy of 73%.
The results show that the proposed DD algorithms perform better than the MB
algorithms in terms of accuracy and are comparable in terms of prediction time. Results also indicate the proposed DD algorithms are more scalable, robust against noise but are computationally expensive. ...
There are two most widely used and researched localization techniques to determine the location of the asset. First, a model based(MB) method (e.g. Trilateration algorithm) which uses a mathematical model based on distance and second is a data-driven(DD) method (e.g. Fingerprinting algorithm) that relies on existing data, like RSSI to directly get the location. Algorithms are tested on real data collected by the Crownstones at the Almende office(test environment) divided into a finite number of locations or rooms. Metrics are defined based on the requirements of Almende to compare the MB algorithms with the DD algorithms. In this thesis, firstly, a centralized multilateration(MB-C) algorithm is implemented taking into account distances from N Crownstones at the office. Since one of the requirements was to perform in-network localization, a simple averaging consensus based distributed(MB-D) algorithm was selected and compared against the MB-C algorithm. Results show that the MB-D algorithm is faster, scalable and robust against single-point of failure than the MB-C but is less accurate and does not converge to the centralized solution for a noise variance greater than 10dB.
The MB algorithms have limitations in terms of selecting a model, learning the
model parameters and an additional step of mapping the position output of the implemented MB algorithms to a location is also required. To deal with these challenges, a Machine-learning(ML) based data-driven algorithm is proposed. In this, training datasets were iteratively improved with different features. Then, an Ensemble based centralized ML algorithm (DD-C) is implemented, giving a classification accuracy of 65%. Algorithm is further improved by distributed data handling leading to a classification accuracy of 77%. There has been very little to no study on finding the room-level location of an asset in an indoor setting using a distributed ML based data-driven algorithm. A consensus based distributed ML algorithm (DD-D) is proposed that performs local predictions within the Crownstone network using the same globally trained model giving a classification accuracy of 73%.
The results show that the proposed DD algorithms perform better than the MB
algorithms in terms of accuracy and are comparable in terms of prediction time. Results also indicate the proposed DD algorithms are more scalable, robust against noise but are computationally expensive.
In this thesis, a cryogenic CMOS readout for SNSPD is designed and taped-out using TSMC 40 nm technology. The SNSPD is designed for color-center quantum computing, which is anticipated to work in the wavelength range of 619-620 nm and 625-750 nm, and at a temperature of 1.8 K. The readout electronics are expected to operate at 4 K. The system is required to have a detection efficiency of more than 90 % and a dark count rate of less than 1 Hz. With the help of SPICE dynamic model, the SNSPD is reproduced in Cadence Spectre for circuit design. Active quenching is implemented in the readout architecture, allowing for an increased readout resistor, which improves the output slew rate and count rates without any latching while still keeping a high bias current for a higher detection efficiency. Under a -40 degree Celsius simulation, the readout system achieved count rates greater than 20 MHz, an average jitter of 25 ps rms, and a power consumption of 36 uW, while simultaneously expecting to significantly suppress the dark count rates and after pulses. ...
In this thesis, a cryogenic CMOS readout for SNSPD is designed and taped-out using TSMC 40 nm technology. The SNSPD is designed for color-center quantum computing, which is anticipated to work in the wavelength range of 619-620 nm and 625-750 nm, and at a temperature of 1.8 K. The readout electronics are expected to operate at 4 K. The system is required to have a detection efficiency of more than 90 % and a dark count rate of less than 1 Hz. With the help of SPICE dynamic model, the SNSPD is reproduced in Cadence Spectre for circuit design. Active quenching is implemented in the readout architecture, allowing for an increased readout resistor, which improves the output slew rate and count rates without any latching while still keeping a high bias current for a higher detection efficiency. Under a -40 degree Celsius simulation, the readout system achieved count rates greater than 20 MHz, an average jitter of 25 ps rms, and a power consumption of 36 uW, while simultaneously expecting to significantly suppress the dark count rates and after pulses.