Towards the integration of carbon nanotubes as vias in monolithic three-dimensional integrated circuits

Aluminum-induced iso-epitaxy of silicon for low-temperature fabrication of centimeter-large p+n junctions

VUV/low-energy electron Si photodiodes with postmetal 400°C PureB deposition

Integrating low-temperature carbon nanotubes as vertical interconnects in Si technology

Low-temperature bottom-up integration of carbon nanotubes for vertical interconnects in monolithic 3D integrated circuits

Epitaxial growth of large-area p+n diodes at 400 ºC by aluminum-induced crystallization

Integrating carbon nanotubes as vias in a monolithic 3DIC process

Electrical characterization of carbon nanotube vertical interconnects with different lengths and widths

Low-complexity full-melt laser-anneal process for fabrication of low-leakage implanted ultrashallow junctions

Integrating low temperature aligned carbon nanotubes as vertical interconnects in Si technology

Electrical characterisation of low temperature aligned carbon nanotubes for vertical interconnects

Integration of MOSFETs with SiGe dots as stressor material

Excimer laser crystallization of thick a-Si for photodiode and solar cell applications

n-Channel MOSFETs fabricated on SiGe dots for strain-enhanced mobility

Strained single grain silicon n- and p- channel thin-film transistors by excimer laser

MOSFETS on self assembled SiGe dots with strain-enhanced mobility

Patterned growth of carbon nanotubes for vertical interconnects in 3D integrated circuits

High performance single-grain Ge TFTs without seed substrate

Thermal budget considerations for excimer laser annealing of implanted dopants

Location- and orientation-controlled, large single grain silicon induced by pulsed excimer laser crystallization